backplane_crc Entity Reference

Inheritance diagram for backplane_crc:

Entities
rtl	architecture

Libraries
IEEE

Use Clauses
STD_LOGIC_1164
numeric_std
STD_LOGIC_UNSIGNED

Generics
fex_check	integer := 0
crc20_G_Poly	std_logic_vector ( 19 downto 0 ) := x " 8349f "

Ports
clock	in	std_logic
reset	in	std_logic
s_tvalid	in	std_logic
s_tlast	in	std_logic
s_tdata	in	std_logic_vector ( 63 downto 0 )
header_error	out	std_logic
payload_error	out	std_logic
length_error	out	std_logic

Detailed Description

Definition at line 36 of file backplane_crc.vhd.

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The documentation for this class was generated from the following file:

• ROD/packet_processor/hdl/backplane_crc.vhd