backplane_regs Entity Reference

Inheritance diagram for backplane_regs:

Entities
RTL	architecture

Libraries
IEEE

Use Clauses
STD_LOGIC_1164
ipbus
ipbus_decode_L1CaloHubRodBackplaneRegisters
STD_LOGIC_UNSIGNED

Ports
ipb_clk	in	std_logic
ipb_rst	in	std_logic
ipb_in	in	ipb_wbus
ipb_out	out	ipb_rbus
pp_clock	in	std_logic
clk_40	in	std_logic
clk_160	in	std_logic
clk_125	in	std_logic
rt_clk	in	std_logic
ck_pll_lock	in	std_logic
timer_reset	in	std_logic
CK_INT	in	STD_LOGIC
SMBALERT_B	in	STD_LOGIC
T_WRN_B	in	STD_LOGIC
channel_up	in	STD_LOGIC_VECTOR ( 23 downto 0 )
chan_enable	out	STD_LOGIC_VECTOR ( 23 downto 0 )
first_chan	out	STD_LOGIC_vector ( 4 downto 0 )
last_chan	out	STD_LOGIC_vector ( 4 downto 0 )
ro_status	in	STD_LOGIC_VECTOR ( 7 downto 0 )
time_count	out	STD_LOGIC_VECTOR ( 31 downto 0 )
tob_fifo_busy_threshold	out	STD_LOGIC_VECTOR ( 31 downto 0 )
bulk_fifo_busy_threshold	out	STD_LOGIC_VECTOR ( 31 downto 0 )
tob_fifo_xoff_threshold	out	STD_LOGIC_VECTOR ( 31 downto 0 )
bulk_fifo_xoff_threshold	out	STD_LOGIC_VECTOR ( 31 downto 0 )
backplane_control	out	STD_LOGIC_VECTOR ( 31 downto 0 )
chan_disable	out	STD_LOGIC_VECTOR ( 31 downto 0 )
combined_busy	in	std_logic
ro_user_clock	in	std_logic

Detailed Description

Definition at line 39 of file backplane_regs.vhd.

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The documentation for this class was generated from the following file:

• ROD/packet_processor/hdl/backplane_regs.vhd