ev_builder Entity Reference

Inheritance diagram for ev_builder:

Entities
RTL	architecture

Libraries
IEEE

Use Clauses
STD_LOGIC_1164
NUMERIC_STD
STD_LOGIC_UNSIGNED
controller_codes	Package <controller_codes>
ff	Package <ff>

Generics
CRC20_G_Poly	std_logic_vector ( 19 downto 0 ) := x " 8349f "
jfex	integer := 0
bp_width	integer := 64
event_width	integer := 64
header_width	integer := 64

Ports
clock	in	STD_LOGIC
reset	in	STD_LOGIC
geo_location	in	STD_LOGIC_VECTOR ( 7 downto 0 )
s_tdata	in	STD_LOGIC_VECTOR ( bp_width- 1 downto 0 )
s_tvalid	in	STD_LOGIC
s_tlast	in	STD_LOGIC
s_header_mark	in	STD_LOGIC
s_trailer_mark	in	STD_LOGIC
s_hdr_crc_tag	in	STD_LOGIC
s_tready	out	STD_LOGIC
nxt_chan	out	STD_LOGIC
empty_0	in	STD_LOGIC
empty_1	in	STD_LOGIC
empty_2	in	STD_LOGIC
empty_3	in	STD_LOGIC
match_0	in	STD_LOGIC
match_1	in	STD_LOGIC
match_2	in	STD_LOGIC
match_3	in	STD_LOGIC
lead_follow_b	in	STD_LOGIC
comb_error	in	STD_LOGIC
hdr_match	out	STD_LOGIC
poll_chan	out	STD_LOGIC
current_chan	in	STD_LOGIC_VECTOR ( 4 downto 0 )
num_chan	in	STD_LOGIC_VECTOR ( 4 downto 0 )
chan_in	in	STD_LOGIC_VECTOR ( 4 downto 0 )
chan_enable	in	STD_LOGIC
first_chan	in	STD_LOGIC_VECTOR ( 4 downto 0 )
last_chan	in	STD_LOGIC_VECTOR ( 4 downto 0 )
chan_pointer_reset	out	STD_LOGIC
any_chan_active	in	std_logic
event_sel	in	STD_LOGIC_VECTOR ( 1 downto 0 )
rod_slot	in	std_logic
flx_backpressure	in	STD_LOGIC
flx_bp_enable	in	STD_LOGIC
TTC_ignore	in	STD_LOGIC
master_header	in	STD_LOGIC_VECTOR ( 63 downto 0 )
header_fifo_empty	in	STD_LOGIC
L1ID_error	in	STD_LOGIC
CTTC_CRC_error	in	STD_LOGIC
header_read_en	out	STD_LOGIC
header_fifo_valid	in	STD_LOGIC
header_fifo_full	in	STD_LOGIC
header_sequence	in	STD_LOGIC_VECTOR ( 11 downto 0 )
header_type	in	STD_LOGIC_VECTOR ( 3 downto 0 )
m_tvalid	out	STD_LOGIC
m_tlast	out	STD_LOGIC
m_tdata	out	STD_LOGIC_VECTOR ( ( bp_width- 1 ) downto 0 )
m_header_marker	out	STD_LOGIC
m_tail_marker	out	STD_LOGIC
m_tready	in	STD_LOGIC
state_out	out	STD_LOGIC_VECTOR ( 5 DOWNTO 0 )
event_fifo_level	out	STD_LOGIC_VECTOR ( 31 DOWNTO 0 )
debug_fifo_level	out	STD_LOGIC_VECTOR ( 31 DOWNTO 0 )
crc20_err	out	STD_LOGIC
crc20_err_chan	out	STD_LOGIC_VECTOR ( 4 downto 0 ) := " 00000 "
crc9_err	out	STD_LOGIC
BCID_mismatch	out	STD_LOGIC
l1ID_mismatch	out	STD_LOGIC
timeout_err	out	STD_LOGIC
timeout_1_val	in	STD_LOGIC_VECTOR ( 15 downto 0 )
timeout_n_val	in	STD_LOGIC_VECTOR ( 15 downto 0 )
wdog_overflow	out	STD_LOGIC
wdog_threshold	in	STD_LOGIC_VECTOR ( 15 downto 0 )
wdog_disable	in	STD_LOGIC
l1id_resync_enable	in	STD_LOGIC
tob_timeout_1_disable	in	STD_LOGIC
tob_timeout_n_disable	in	STD_LOGIC
ttc_rollover	out	std_logic
dbg_pkt_count	out	std_logic_VECTOR ( 31 downto 0 )
dbg_pkt_count_reset	in	STD_LOGIC
L1ID_ttc_32_reg_out	out	std_logic_VECTOR ( 31 downto 0 )
stop_proc	in	std_logic
l1id_max_l1id_o	out	std_logic_VECTOR ( 31 downto 0 )
l1id_measure_max_o	out	std_logic_VECTOR ( 31 downto 0 )
l1id_measure_last_o	out	std_logic_VECTOR ( 31 downto 0 )
clr_pkt_wait_timer	in	STD_LOGIC
timeout_counter_max	out	std_logic_VECTOR ( 15 downto 0 )
max_chan	out	std_logic_VECTOR ( 4 downto 0 )
clr_max_timeout	in	STD_LOGIC

Detailed Description

Definition at line 86 of file ev_builder.vhd.

Member Data Documentation

IEEE

IEEE

Library

this ev_builder block is the primary state machine for TOB processing. Note the "use work.controller_codes.all" statement: the controller_codes library file contains output values for each state

Definition at line 25 of file ev_builder.vhd.

---

The documentation for this class was generated from the following file:

• ROD/packet_processor/hdl/ev_builder.vhd