RTL Architecture Reference

Processes
PROCESS_348	( pp_clock )
PROCESS_349	( pp_clock )
PROCESS_350	( pp_clock )

Signals
wd_counter	std_logic_vector ( msb downto 0 ) := ( others = > ' 0 ' )
overflow_i	std_logic := ' 0 '
output_timer	std_logic_vector ( 7 downto 0 ) := x " 00 "
wdog_overflow_i	std_logic

Detailed Description

Definition at line 48 of file watchdog.vhd.

---

The documentation for this class was generated from the following file:

• ROD/packet_processor/hdl/watchdog.vhd