FIFO_to_MGT_RAW_FSM Entity Reference

FSM to read RAW Event data from Link Output FIFO to MGT for process FPGA. More...

Inheritance diagram for FIFO_to_MGT_RAW_FSM:

Entities
Behavioral	architecture
	FSM to read RAW Event data from Link Output FIFO to MGT for process FPGA. More...

Libraries
IEEE
TOB_rdout_lib

Use Clauses
STD_LOGIC_1164
NUMERIC_STD
TOB_rdout_ip_pkg	Package <TOB_rdout_ip_pkg>
data_type_pkg	Package <data_type_pkg>

Ports
TOB_FIFO_sw_rst	in	std_logic
		TOB Readout FIFO reset Pulse by software command ORed with SYS_RST.
clk_in_280M	in	STD_LOGIC
RAW_ready_in	in	std_logic
		Ready signal from control FPGA to receive RAW data from process FPGA.
frame_counter	in	STD_LOGIC_VECTOR ( 11 downto 0 )
		Frame counter register.
FIFO_MGT_TOBs	in	STD_LOGIC_VECTOR ( 32 downto 0 )
		RAW from Link Output FIFO.
FIFO_MGT_TOB_valid	in	STD_LOGIC
		RAW from Link Output FIFO valid signal.
LO_FIFO_empty	in	std_logic
		Link Output FIFO Empty Flag.
FIFO_MGT_rd_en	out	STD_LOGIC
		Read enalbe singal to Link Output FIFO.
frame_counter_dec_en	out	STD_LOGIC
		Decrement Frame Counter.
RAW_data_out	out	STD_LOGIC_VECTOR ( 31 downto 0 )
		32b RAW to connect to output MGT to control FPGA
RAW_data_is_char	out	STD_LOGIC
		RAW is CHAR to connect to output MGT to control FPGA.
RAW_data_out_valid	out	STD_LOGIC
		RAW is valid signal to wr to SPY memory.
raw_data_mgt_fsm	out	STD_LOGIC_VECTOR ( 7 downto 0 )
		Monitor state machine status register.

Detailed Description

FSM to read RAW Event data from Link Output FIFO to MGT for process FPGA.

This FSM reads RAW frames from Link Output FIFO and writes into MGT to transmit to cFPGA. This FSM handles one full frame at a time without pausing. It monitors the RAW_frame_counter to find out if there are Frames waiting to be transmitted to cFPGA. The Frames are only transmitted when cFPGA indicates it is ready to receive data by setting ctrl_RAW_ready signal to 1. If ctrl_RAW_ready signal is set to 0 by cFPGA, this indicates cFPGA is not ready to receive data, in this case events accumulate in Link Output FIFO until occupancy reaches a pre-define prog_FULL level, at this time, Link Output FIFO stops receiving data. The data transmission of MGT is at 11.2 Gbps.

Author

Saeed Taghavi

Definition at line 29 of file FIFO_to_MGT_RAW_FSM.vhd.

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The documentation for this class was generated from the following file:

• Readout/src/FIFO_to_MGT_RAW_FSM.vhd