struct Architecture Reference

regsynch logic More...

Detailed Description

regsynch logic

it assigns the input data to the data out.

Author

Mohammed Siyad

Definition at line 24 of file Regsync_logic.vhd.

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The documentation for this class was generated from the following file:

• Infrastructure/process_Fpga_common/src/Data_Path/Regsync_logic.vhd