mgt_buffer Entity Reference

Second version of packet format engine from MGT through to formatted (sub)block... More...

Inheritance diagram for mgt_buffer:

Entities
rtl	architecture
	Second version of packet format engine from MGT through to formatted (sub)block... More...

Libraries
ieee
	Use standard library.
ipbus_lib
	Use IPbus library.

Use Clauses
std_logic_1164
numeric_std
ipbus

Generics
INPUT_FPGA_NO	std_logic_vector ( 1 downto 0 ) := " 00 "
DATA_FORMAT_VERSION	std_logic_vector ( 2 DOWNTO 0 ) := " 001 "
IPBUS_ADDR_WIDTH	positive := 10
ILA_ENABLED	std_logic := ' 0 '

Ports
eFEX_number	in	std_logic_vector ( 7 downto 0 )
enable	in	std_logic
clk_mgt	in	std_logic
data_from_mgt	in	std_logic_vector ( 31 downto 0 )
char_is_k	in	std_logic
error_from_mgt	in	std_logic
clk_320	in	std_logic
rst_320	in	std_logic
fifo_data	out	std_logic_vector ( 63 DOWNTO 0 )
fifo_valid	out	std_logic
fifo_last	out	std_logic
mgt_last_l1id	out	std_logic_vector ( 31 downto 0 )
mgt_packet_stats	out	std_logic_vector ( 4 downto 0 )
clk_ipb	in	std_logic
rst_ipb	in	std_logic
rst_ipbus_addr	in	std_logic
ipbus_wraparound	in	std_logic
ipb_in	in	ipb_wbus
ipb_out	out	ipb_rbus

Detailed Description

Second version of packet format engine from MGT through to formatted (sub)block...

Format incoming packet (Input Data or TOB) from MGT through to formatted output In the case of Input Data no further processing is required en route to link, in case of TOB/xTOB this is a fragment ready for merging

Author

David Sankey

Definition at line 19 of file mgt_buffer.vhd.

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The documentation for this class was generated from the following file:

• Infrastructure/control_fpga/src/data_path/mgt_buffer.vhd