rtl Architecture Reference

Second version of packet format engine... More...

Processes
Input_buffer	( clk )
Ready_block	( clk )
	Assert m_axis_tready from when state machine is ready until end of packet.
Output_buffer	( clk )
	Capture and count pairs of 32 bit words to write into output FIFO suppressing completely empty blocks.
Input_length_block	( clk )
Slice_length_block	( clk )
Trailer_checker	( clk )
Output_Data_engine	( clk )
State_machine	( clk )

Types
STATE_TYPE	( init , pause , waiting , new_packet , save_payload , tob_trailer , padding , corrective_trailer , write_trailer , write_last )

Signals
state_sig	STATE_TYPE := init
data_from_mgt_fifo_sig	std_logic_vector ( 31 downto 0 )
data_from_mgt_fifo_buf	std_logic_vector ( 31 downto 0 )
data_output_sig	std_logic_vector ( 31 downto 0 )
input_length_sig	std_logic_vector ( 8 downto 0 )
output_length_sig	std_logic_vector ( 8 downto 0 )
slice_length_sig	std_logic_vector ( 8 downto 0 )
write_block_sig	std_logic := ' 0 '
write_block_buf	std_logic := ' 0 '
we_sig	std_logic := ' 0 '
last_sig	std_logic := ' 0 '
char_is_k_sig	std_logic := ' 0 '
error_from_mgt_sig	std_logic := ' 0 '
TOB_mode_sig	std_logic := ' 0 '
TOB_trailer_OK_sig	std_logic := ' 0 '
valid_sig	std_logic := ' 0 '
valid_buf	std_logic := ' 0 '
data_fifo_valid_sig	std_logic := ' 0 '
Errors_sig	std_logic_vector ( 3 downto 0 )
trailer_info_sig	std_logic_vector ( 11 downto 0 )

Detailed Description

Second version of packet format engine...

Format incoming packet (Input Data or TOB) from CDC FIFO into data FIFO

Author

David Sankey

Definition at line 39 of file mgt_readout_receiver.vhd.

Member Function Documentation

State_machine()

State_machine (   clk   )

Process

Trailer Word 2:

• TOBs_out_i(31) = safe mode
• TOBs_out_i(30:27) = ZERO
• TOBs_out_i(26:24) = DPR_locations_to_rd (number of slices to read)
• TOBs_out_i(23:20) = trigger slice number
• TOBs_out_i(19:8) = TOB payload counter
• TOBs_out_i(7:0) = ch_eop = X"DC"

Definition at line 331 of file mgt_readout_receiver.vhd.

Trailer_checker()

Trailer_checker (   clk   )

Process

Trailer Word 1:

• TOBs_out_i(31) = ‘0’ (Corrective Trailer)
• TOBs_out_i(30) = Input Error (OR of all input errors on this FPGA)
• TOBs_out_i(29:28) = FPGA_mapping
• TOBs_out_i(27) = safe mode
• TOBs_out_i(26:24) = slice number transmitted
• TOBs_out_i(23:18) = XTOB counter tau
• TOBs_out_i(17:12) = XTOB counter e/g
• TOBs_out_i(11:9) = TOB counter
• TOBs_out_i(8) = TOB type in
• TOBs_out_i(7:0) = K28.2 (x”5C”)

Definition at line 203 of file mgt_readout_receiver.vhd.

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The documentation for this class was generated from the following file:

• Infrastructure/control_fpga/src/data_path/mgt_readout_receiver.vhd