eFEX firmware  1.7.3
ATLAS l1-calo - electron and tau feature extraction firmware for eFEX boards

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Processes | Signals | Types
Behavioral Architecture Reference

Reset generation of PLLs. More...

Processes

clocked_proc  ( clk , reset )
nextstate_proc  ( cntr , current_state , en_rst )

Types

STATE_TYPE  ( s0 , s1 , s2 )

Signals

cntr  unsigned ( 5 downto 0 )
current_state  STATE_TYPE
next_state  STATE_TYPE
nreset_cld  std_logic

Detailed Description

Reset generation of PLLs.

This state machine generates reset signal when en_rst is received .

Author
Mohammed Siyad

Definition at line 31 of file nreset_gen.vhd.


The documentation for this class was generated from the following file: