eFEX firmware  1.7.3
ATLAS l1-calo - electron and tau feature extraction firmware for eFEX boards

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Behavioral Architecture Reference

PLL enable for the control FPGA. More...

Detailed Description

PLL enable for the control FPGA.

This is PLL enable selector mux that is controlled through IPbus

Author
Mohammed Siyad

Definition at line 22 of file pll_selector.vhd.


The documentation for this class was generated from the following file: