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eFEX firmware
1.7.3
ATLAS l1-calo - electron and tau feature extraction firmware for eFEX boards
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quad bc alignment More...
Entities | |
| Behavioral | architecture |
| quad bc alignment More... | |
Libraries | |
| IEEE | |
| infrastructure_lib | |
Use Clauses | |
| STD_LOGIC_1164 | |
| NUMERIC_STD | |
| all | |
Ports | ||
| reset | in | std_logic |
| reset | ||
| clk | in | std_logic |
| TTC 40MHz clock. | ||
| start | in | std_logic |
| start pulse | ||
| bcn_0 | in | std_logic_vector ( 6 downto 0 ) |
| bunch crossing number of channel 1 | ||
| bcn_1 | in | std_logic_vector ( 6 downto 0 ) |
| bunch crossing number of channel 3 | ||
| bcn_2 | in | std_logic_vector ( 6 downto 0 ) |
| bunch crossing number of channel 2 | ||
| bcn_3 | in | std_logic_vector ( 6 downto 0 ) |
| bunch crossing number of channel 3 | ||
| ref_orbit | in | std_logic |
| orbit reference signal | ||
| aeqb_ch0 | out | std_logic |
| two counter equal in channel 0 | ||
| aeqb_ch1 | out | std_logic |
| two counter equal in channel 1 | ||
| aeqb_ch2 | out | std_logic |
| two counter equal in channel 2 | ||
| aeqb_ch3 | out | std_logic |
| two counter equal in channel 3 | ||
| cntr_ch0 | out | std_logic_vector ( 6 downto 0 ) |
| counter value of channel 0 | ||
| cntr_ch1 | out | std_logic_vector ( 6 downto 0 ) |
| counter value of channel 1 | ||
| cntr_ch2 | out | std_logic_vector ( 6 downto 0 ) |
| counter value of channel 2 | ||
| cntr_ch3 | out | std_logic_vector ( 6 downto 0 ) |
| counter value of channel 3 | ||
quad bc alignment
it combines the pseudo orbit generation and orbit state machine in channel level and makes a quad
Definition at line 15 of file quad_bc_alignment.vhd.
1.9.1