Behavioral Architecture Reference

quad bc alignment More...

Processes
process_ch0	( clk )
process_ch1	( clk )
process_ch2	( clk )
process_ch3	( clk )

Signals
pseudo_orbit_ch0	std_logic
pseudo_orbit_ch1	std_logic
pseudo_orbit_ch2	std_logic
pseudo_orbit_ch3	std_logic
cntr_ch0_int	std_logic_vector ( 4 downto 0 )
cntr_ch1_int	std_logic_vector ( 4 downto 0 )
cntr_ch2_int	std_logic_vector ( 4 downto 0 )
cntr_ch3_int	std_logic_vector ( 4 downto 0 )
aeqb_ch0_int	std_logic
aeqb_ch1_int	std_logic
aeqb_ch2_int	std_logic
aeqb_ch3_int	std_logic

Instantiations
ch0_pseudo	pseudo_orbit_gen <Entity pseudo_orbit_gen>
ch1_pseudo	pseudo_orbit_gen <Entity pseudo_orbit_gen>
ch2_pseudo	pseudo_orbit_gen <Entity pseudo_orbit_gen>
ch3_pseudo	pseudo_orbit_gen <Entity pseudo_orbit_gen>
sm_orbit_0	orbit_sm <Entity orbit_sm>
sm_orbit_1	orbit_sm <Entity orbit_sm>
sm_orbit_2	orbit_sm <Entity orbit_sm>
sm_orbit_3	orbit_sm <Entity orbit_sm>

Detailed Description

quad bc alignment

it combines the pseudo orbit generation and orbit state machine in channel level and makes a quad

Author

Mohammed Siyad

Definition at line 52 of file quad_bc_alignment.vhd.

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The documentation for this class was generated from the following file:

• Infrastructure/process_Fpga_common/src/Data_Path/quad_bc_alignment.vhd