eFEX firmware  1.7.3
ATLAS l1-calo - electron and tau feature extraction firmware for eFEX boards

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quad_bc_alignment.vhd
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1 
6 
7 library IEEE;
8 use IEEE.STD_LOGIC_1164.ALL;
9 use IEEE.NUMERIC_STD.ALL;
10 library infrastructure_lib;
11 use infrastructure_lib.all;
12 
14 
16  Port (
17  reset : in std_logic;
19  clk : in std_logic;
21  start : in std_logic;
23  bcn_0 : in std_logic_vector(6 downto 0);
25  bcn_1 : in std_logic_vector(6 downto 0);
27  bcn_2 : in std_logic_vector(6 downto 0);
29  bcn_3 : in std_logic_vector(6 downto 0);
31  ref_orbit: in std_logic;
33  aeqb_ch0 : out std_logic;
35  aeqb_ch1 : out std_logic;
37  aeqb_ch2 : out std_logic;
39  aeqb_ch3 : out std_logic;
41  cntr_ch0 : out std_logic_vector( 6 downto 0);
43  cntr_ch1 : out std_logic_vector( 6 downto 0);
45  cntr_ch2 : out std_logic_vector( 6 downto 0);
47  cntr_ch3 : out std_logic_vector( 6 downto 0)
48  );
49 
52 architecture Behavioral of quad_bc_alignment is
53 signal pseudo_orbit_ch0,pseudo_orbit_ch1,pseudo_orbit_ch2,pseudo_orbit_ch3:std_logic;
54 signal cntr_ch0_int,cntr_ch1_int,cntr_ch2_int,cntr_ch3_int :std_logic_vector( 4 downto 0) ;
55 signal aeqb_ch0_int,aeqb_ch1_int,aeqb_ch2_int,aeqb_ch3_int :std_logic;
56 
57 begin
58 
59 
60  aeqb_ch0 <= aeqb_ch0_int;
61  aeqb_ch1 <= aeqb_ch1_int;
62  aeqb_ch2 <= aeqb_ch2_int;
63  aeqb_ch3 <= aeqb_ch3_int;
64 
65 process_ch0: process (clk)
66  begin
67  if clk' event and clk = '1' then
68  if aeqb_ch0_int ='1' then -- enable high
69  cntr_ch0 <= "00" & cntr_ch0_int; -- latch the output the value of the counter
70  end if;
71  end if;
72  end process;
73 
74 process_ch1: process (clk)
75  begin
76  if clk' event and clk = '1' then
77  if aeqb_ch1_int ='1' then -- enable high
78  cntr_ch1 <= "00" & cntr_ch1_int; -- latch output the value of the counter
79  end if;
80  end if;
81  end process;
82 
83 process_ch2: process (clk)
84  begin
85  if clk' event and clk = '1' then
86  if aeqb_ch2_int ='1' then -- enable high
87  cntr_ch2 <= "00" & cntr_ch2_int; -- latch output the value of the counter
88  end if;
89  end if;
90  end process;
91 
92 process_ch3: process (clk)
93  begin
94  if clk' event and clk = '1' then
95  if aeqb_ch3_int ='1' then -- enable high
96  cntr_ch3 <= "00" & cntr_ch3_int; -- latch output the value of the counter
97  end if;
98  end if;
99  end process;
100 
101 
102 
103 
104 
105 
106 
107 ch0_pseudo: entity infrastructure_lib.pseudo_orbit_gen
108  port map (
109  clk => clk,
110  bcn => bcn_0(4 downto 0),
111  pseudo_orbit => pseudo_orbit_ch0
112 
113  );
114 
115 ch1_pseudo: entity infrastructure_lib.pseudo_orbit_gen
116  port map (
117  clk => clk,
118  bcn => bcn_1(4 downto 0),
119  pseudo_orbit => pseudo_orbit_ch1
120 
121  );
122 
123 ch2_pseudo: entity infrastructure_lib.pseudo_orbit_gen
124  port map (
125  clk => clk,
126  bcn => bcn_2(4 downto 0),
127  pseudo_orbit => pseudo_orbit_ch2
128 
129  );
130 
131 ch3_pseudo: entity infrastructure_lib.pseudo_orbit_gen
132  port map (
133  clk => clk,
134  bcn => bcn_3( 4 downto 0),
135  pseudo_orbit => pseudo_orbit_ch3
136 
137  );
138 
139 sm_orbit_0: entity infrastructure_lib.orbit_sm
140  port map (
141  clk => clk,
142  reset => reset,
143  ref_orbit => ref_orbit, --- use the pseudo orbit signal of channel 0 as a reference
144  chan_orbit => pseudo_orbit_ch0, -- pseudo orbit of channel 0
145  start => start,
146  A_eq_B => aeqb_ch0_int, -- compare the value of the two counters and if equal set a_eq_b high
147  cntr_value => cntr_ch0_int -- this the bc countter value
148 
149  );
150 
151 sm_orbit_1: entity infrastructure_lib.orbit_sm
152  port map (
153  clk => clk,
154  reset => reset,
155  ref_orbit => ref_orbit, --- use the pseudo orbit signal of channel 0 as a reference
156  chan_orbit => pseudo_orbit_ch1, -- pseudo orbit of channel 1
157  start => start,
158  A_eq_B => aeqb_ch1_int, -- compare the value of the two counters and if equal set a_eq_b high
159  cntr_value => cntr_ch1_int -- this the bc countter value
160 
161  );
162 
163 sm_orbit_2: entity infrastructure_lib.orbit_sm
164  port map (
165  clk => clk,
166  reset => reset,
167  ref_orbit => ref_orbit, --- use the pseudo orbit signal of channel 0 as a reference
168  chan_orbit => pseudo_orbit_ch2, -- pseudo orbit of channel 2
169  start => start,
170  A_eq_B => aeqb_ch2_int, -- compare the value of the two counters and if equal set a_eq_b high
171  cntr_value => cntr_ch2_int -- this the bc countter value
172 
173  );
174 
175 sm_orbit_3: entity infrastructure_lib.orbit_sm
176  port map (
177  clk => clk,
178  reset => reset,
179  ref_orbit => ref_orbit, --- use the pseudo orbit signal of channel 0 as a reference
180  chan_orbit => pseudo_orbit_ch3, -- pseudo orbit of channel 3
181  start => start,
182  A_eq_B => aeqb_ch3_int, -- compare the value of the two counters and if equal set a_eq_b high
183  cntr_value => cntr_ch3_int -- this the bc countter value
184 
185  );
186 
187  end Behavioral;
orbit sm
Definition: orbit_sm.vhd:13
in reset std_logic
reset
Definition: orbit_sm.vhd:22
in clk std_logic
clock
Definition: orbit_sm.vhd:18
out cntr_value std_logic_vector( 4 DOWNTO 0)
count value
Definition: orbit_sm.vhd:29
out A_eq_B std_logic
two counter equal
Definition: orbit_sm.vhd:26
in chan_orbit std_logic
channel orbit
Definition: orbit_sm.vhd:16
in start std_logic
start
Definition: orbit_sm.vhd:24
in ref_orbit std_logic
reference orbit channel
Definition: orbit_sm.vhd:20
pseudo orbit gen
in clk std_logic
ttc clock
in bcn std_logic_vector( 4 downto 0)
5 lsb of the bcn kn the data
out pseudo_orbit std_logic
pseudo orbit pulse generated
quad bc alignment
in reset std_logic
reset
out cntr_ch2 std_logic_vector( 6 downto 0)
counter value of channel 2
out aeqb_ch1 std_logic
two counter equal in channel 1
out aeqb_ch2 std_logic
two counter equal in channel 2
in bcn_2 std_logic_vector( 6 downto 0)
bunch crossing number of channel 2
in clk std_logic
TTC 40MHz clock.
in bcn_0 std_logic_vector( 6 downto 0)
bunch crossing number of channel 1
out aeqb_ch0 std_logic
two counter equal in channel 0
out aeqb_ch3 std_logic
two counter equal in channel 3
in bcn_1 std_logic_vector( 6 downto 0)
bunch crossing number of channel 3
in bcn_3 std_logic_vector( 6 downto 0)
bunch crossing number of channel 3
out cntr_ch0 std_logic_vector( 6 downto 0)
counter value of channel 0
in start std_logic
start pulse
out cntr_ch1 std_logic_vector( 6 downto 0)
counter value of channel 1
out cntr_ch3 std_logic_vector( 6 downto 0)
counter value of channel 3
in ref_orbit std_logic
orbit reference signal