slave_RAW_readout Entity Reference

RAW calorimeter data readout slave registers. More...

Inheritance diagram for slave_RAW_readout:

Entities
Behavioral	architecture
	RAW calorimeter data readout slave registers. More...

Libraries
IEEE
ipbus_lib
TOB_rdout_lib

Use Clauses
STD_LOGIC_1164
ipbus
data_type_pkg	Package <data_type_pkg>
ipbus_decode_efex_raw_readout

Ports
ipb_rst	in	std_logic
		IPBus Reset input.
ipb_clk	in	std_logic
		IPBus Clock input.
IPb_in	in	ipb_wbus
		IPBus input bus going from master to slaves.
IPb_out	out	ipb_rbus
		IPBus output bus going from slaves to master.
RAW_FIFO_pFULL_THRESH_ASSERT	out	std_logic_vector ( 8 downto 0 )
		Derandomisation FIFO partial full flag assert threshold.
RAW_FIFO_pFULL_THRESH_NEGATE	out	std_logic_vector ( 8 downto 0 )
		36b derandomisation FIFO partial full flag negate threshold
BCN_FIFO_pFULL_THRESH_assert	out	std_logic_vector ( 8 downto 0 )
		BCN FIFO partial full flag assert threshold.
BCN_FIFO_pFULL_THRESH_negate	out	std_logic_vector ( 8 downto 0 )
		BCN FIFO partial full flag negate threshold.
BCN_FIFO_RAW_rd_data_count	in	STD_LOGIC_VECTOR ( 31 downto 0 )
		BCN & L1A FIFO occupancy for RAW Readout.
Link_output_FIFO_pFULL_THRESH_ASSERT	out	std_logic_vector ( 12 downto 0 )
		Link output FIFO (before MGT) partial full flag assert threshold.
Link_output_FIFO_pFULL_THRESH_NEGATE	out	std_logic_vector ( 12 downto 0 )
		Link output FIFO (before MGT) partial full flag negate threshold.
Link_output_FIFO_rd_data_count	in	std_logic_vector ( 31 downto 0 )
		Link output FIFO (before MGT) occupancy data count.
RAW_frame_count	in	std_logic_vector ( 31 downto 0 )
		numer of frames in the link output FIFO to be transmitted to MGT & Control FPGA
RAW_FIFO_FULL_THRESH_ASSERT	out	std_logic_vector ( 8 downto 0 )
		Derandomisation FIFO full flag assert threshold.
RAW_FIFO_FULL_THRESH_NEGATE	out	std_logic_vector ( 8 downto 0 )
		36b derandomisation FIFO full flag negate threshold
RAW_FIFO_data_count	in	std_logic_vector ( 31 downto 0 )
		Derandomisation FIFO FIFO occupancy data count.
raw_busy_thresh_assert	out	STD_LOGIC_VECTOR ( 8 downto 0 )
		raw BUSY flag threshold assert
raw_busy_thresh_negate	out	STD_LOGIC_VECTOR ( 8 downto 0 )
		raw BUSY flag threshold de-assert
RAW_data_FIFO_flags	in	std_logic_vector ( 31 downto 0 )
		Read only register containing all Empty pFull and Full of RAW data block.
RAW_WR_ADDR_OFFSET	out	std_logic_vector ( 9 downto 0 )
		The write address offset pre load for RAW data Circular DRPAM.
SPY_RAW_mem_wr_addr	in	std_logic_vector ( 10 downto 0 )
		RAW SPY Memory write address (read only register)
ipbus_out_raw_dpram	out	ipb_wbus
		IPBus signal going to RAW SPY DPRAM.
ipbus_in_raw_dpram	in	ipb_rbus
		IPBus signal coming from RAW SPY DPRAM.
link_error_flags	in	STD_LOGIC_VECTOR ( 53 downto 0 )
		54-b error flags from the Error Flag FIFO to IPBUS register
raw_fsm_monitor	in	std_logic_vector ( 31 downto 0 )
		Monitor RAW Readout state machines.

Detailed Description

RAW calorimeter data readout slave registers.

This module provides IPBus access for all Read Only and Read/Write reigsters withing the RAW calorimeter readout block. Function of modules/registers are listed in the same order as VHDL code.

Definition at line 44 of file slave_RAW_readout.vhd.

Member Data Documentation

IEEE

IEEE

Library

The IPBus bus fabric, which also has address select logic and data multiplexers. This version selects the addressed slave depending on the state of incoming control lines.

• RAW_FIFO_pFULL_THRESH_ASSERT: Derandomisation FIFO partial full flag assert threshold.
• RAW_FIFO_pFULL_THRESH_NEGATE: Derandomisation FIFO partial full flag negate threshold.
• BCN_FIFO_pFULL_THRESH_assert: BCN FIFO partial full flag assert threshold.
• BCN_FIFO_pFULL_THRESH_negate: BCN FIFO partial full flag negate threshold.
• Link_output_FIFO_pFULL_THRESH_ASSERT: Link output FIFO (before MGT) partial full flag assert threshold.
• Link_output_FIFO_pFULL_THRESH_NEGATE: Link output FIFO (before MGT) partial full flag negate threshold.
• Link_output_FIFO_rd_data_count: Derandomisation FIFO occupancy data count.
• RAW_FIFO_FULL_THRESH_ASSERT: Derandomisation FIFO full flag assert threshold.
• RAW_FIFO_FULL_THRESH_NEGATE: Derandomisation FIFO full flag negate threshold.
• RAW_frame_count: numer of frames in the link output FIFO to be transmitted to MGT & Control FPGA.
• RAW_data_FIFO_flags: holds the status flags for BCN and RAW data FIFOs as well as Safe Mode Operation.
• RAW_WR_ADDR_OFFSET: The write address offset pre load for RAW data Circular DRPAM.
• SPY_RAW_mem_wr_addr: RAW SPY Memory write address (read only register).
• ipbus_out_raw_dpram, ipbus_in_raw_dpram: IPBus read/write access to RAW SPY DPRAM.
• link_error_flags: 54-b error flags, including 49 error flags for 49 fibres, and 4 error flags as the ORed version of flags together.
  • 49-bit Link Error Flags for Fibres 0 to 48
  • 1-bit Not_in_Table Error of 49 fibres
  • 1-bit CRC Error of 49 fibres
  • 1-bit Read out Fibre data due to error
• calo_data_spy_mem: spy RAM (2K) for calorimeter data to cFPGA

Author

Saeed Taghavi

Definition at line 33 of file slave_RAW_readout.vhd.

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The documentation for this class was generated from the following file:

• Readout/src/slave_RAW_readout.vhd