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eFEX firmware
1.7.3
ATLAS l1-calo - electron and tau feature extraction firmware for eFEX boards
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control fpga infrastructure slaves More...
Go to the source code of this file.
Entities | |
| infrastructure_slaves_cntrl | entity |
| control fpga infrastructure slaves More... | |
| Behavioral | architecture |
| control fpga infrastructure slaves More... | |
control fpga infrastructure slaves
This slave infrastructure_slaves_cntrl comprises a collection of IPBus slaves of the control FPGAs. A slave being an interface between IPBus and the application logic. It implements a simple control or status register, an area of RAM that is mapped to IPBus, a state machine under IPBus control, or an interface to a second bus, such as SPI and XADC. The ipbus bus fabric, address select logic, data multiplexers This version selects the addressed slave depending on the state of incoming control lines. The ipbus slaves live in this entity and can be modified according to requirements. In the design ports can be added to give ipbus slaves access to the chip top level.
Definition in file infrastructure_slaves_cntrl.vhd.
1.9.1