interconnect_struct.vhd File Reference

Top ipbus interconnection. More...

Go to the source code of this file.

Entities
interconnect	entity
	Top ipbus interconnection. More...
struct	architecture
	Top ipbus interconnection. More...

Detailed Description

Top ipbus interconnection.

This block interconnects between the process FPGA master rx and master tx to the control FPGA. It generates even parity of the tx data and adds to tx data. It also performs parity check to the rx data from the control FPGA

Author

Mohammed Siyad

Definition in file interconnect_struct.vhd.