Functions
integer	get_cdrlock_time ( is_sim: in in integer )

Processes
gt0_cdrlock_timeout	( SYSCLK_IN )
gt1_cdrlock_timeout	( SYSCLK_IN )
gt2_cdrlock_timeout	( SYSCLK_IN )
gt3_cdrlock_timeout	( SYSCLK_IN )
gt4_cdrlock_timeout	( SYSCLK_IN )
gt5_cdrlock_timeout	( SYSCLK_IN )
gt6_cdrlock_timeout	( SYSCLK_IN )
gt7_cdrlock_timeout	( SYSCLK_IN )
gt8_cdrlock_timeout	( SYSCLK_IN )
gt9_cdrlock_timeout	( SYSCLK_IN )
gt10_cdrlock_timeout	( SYSCLK_IN )
gt11_cdrlock_timeout	( SYSCLK_IN )

Components
DSS_3Quads_11g2_multi_gt	<Entity DSS_3Quads_11g2_multi_gt>
DSS_3Quads_11g2_TX_STARTUP_FSM	<Entity DSS_3Quads_11g2_TX_STARTUP_FSM>
DSS_3Quads_11g2_RX_STARTUP_FSM	<Entity DSS_3Quads_11g2_RX_STARTUP_FSM>
DSS_3Quads_11g2_AUTO_PHASE_ALIGN	<Entity DSS_3Quads_11g2_AUTO_PHASE_ALIGN>
DSS_3Quads_11g2_TX_MANUAL_PHASE_ALIGN	<Entity DSS_3Quads_11g2_TX_MANUAL_PHASE_ALIGN>
DSS_3Quads_11g2_RX_MANUAL_PHASE_ALIGN	<Entity DSS_3Quads_11g2_RX_MANUAL_PHASE_ALIGN>

Constants
DLY	time := 1 ns
RX_CDRLOCK_TIME	integer := get_cdrlock_time ( EXAMPLE_SIMULATION )
WAIT_TIME_CDRLOCK	integer := RX_CDRLOCK_TIME / STABLE_CLOCK_PERIOD

Signals
gt0_txpmaresetdone_i	std_logic
gt0_rxpmaresetdone_i	std_logic
gt0_txresetdone_i	std_logic
gt0_rxresetdone_i	std_logic
gt0_txresetdone_ii	std_logic
gt0_rxresetdone_ii	std_logic
gt0_gttxreset_i	std_logic
gt0_gttxreset_t	std_logic
gt0_gtrxreset_i	std_logic
gt0_gtrxreset_t	std_logic
gt0_txuserrdy_i	std_logic
gt0_txuserrdy_t	std_logic
gt0_rxuserrdy_i	std_logic
gt0_rxuserrdy_t	std_logic
gt0_rxdfeagchold_i	std_logic
gt0_rxdfelfhold_i	std_logic
gt0_rxlpmlfhold_i	std_logic
gt0_rxlpmhfhold_i	std_logic
gt1_txpmaresetdone_i	std_logic
gt1_rxpmaresetdone_i	std_logic
gt1_txresetdone_i	std_logic
gt1_rxresetdone_i	std_logic
gt1_txresetdone_ii	std_logic
gt1_rxresetdone_ii	std_logic
gt1_gttxreset_i	std_logic
gt1_gttxreset_t	std_logic
gt1_gtrxreset_i	std_logic
gt1_gtrxreset_t	std_logic
gt1_txuserrdy_i	std_logic
gt1_txuserrdy_t	std_logic
gt1_rxuserrdy_i	std_logic
gt1_rxuserrdy_t	std_logic
gt1_rxdfeagchold_i	std_logic
gt1_rxdfelfhold_i	std_logic
gt1_rxlpmlfhold_i	std_logic
gt1_rxlpmhfhold_i	std_logic
gt2_txpmaresetdone_i	std_logic
gt2_rxpmaresetdone_i	std_logic
gt2_txresetdone_i	std_logic
gt2_rxresetdone_i	std_logic
gt2_txresetdone_ii	std_logic
gt2_rxresetdone_ii	std_logic
gt2_gttxreset_i	std_logic
gt2_gttxreset_t	std_logic
gt2_gtrxreset_i	std_logic
gt2_gtrxreset_t	std_logic
gt2_txuserrdy_i	std_logic
gt2_txuserrdy_t	std_logic
gt2_rxuserrdy_i	std_logic
gt2_rxuserrdy_t	std_logic
gt2_rxdfeagchold_i	std_logic
gt2_rxdfelfhold_i	std_logic
gt2_rxlpmlfhold_i	std_logic
gt2_rxlpmhfhold_i	std_logic
gt3_txpmaresetdone_i	std_logic
gt3_rxpmaresetdone_i	std_logic
gt3_txresetdone_i	std_logic
gt3_rxresetdone_i	std_logic
gt3_txresetdone_ii	std_logic
gt3_rxresetdone_ii	std_logic
gt3_gttxreset_i	std_logic
gt3_gttxreset_t	std_logic
gt3_gtrxreset_i	std_logic
gt3_gtrxreset_t	std_logic
gt3_txuserrdy_i	std_logic
gt3_txuserrdy_t	std_logic
gt3_rxuserrdy_i	std_logic
gt3_rxuserrdy_t	std_logic
gt3_rxdfeagchold_i	std_logic
gt3_rxdfelfhold_i	std_logic
gt3_rxlpmlfhold_i	std_logic
gt3_rxlpmhfhold_i	std_logic
gt4_txpmaresetdone_i	std_logic
gt4_rxpmaresetdone_i	std_logic
gt4_txresetdone_i	std_logic
gt4_rxresetdone_i	std_logic
gt4_txresetdone_ii	std_logic
gt4_rxresetdone_ii	std_logic
gt4_gttxreset_i	std_logic
gt4_gttxreset_t	std_logic
gt4_gtrxreset_i	std_logic
gt4_gtrxreset_t	std_logic
gt4_txuserrdy_i	std_logic
gt4_txuserrdy_t	std_logic
gt4_rxuserrdy_i	std_logic
gt4_rxuserrdy_t	std_logic
gt4_rxdfeagchold_i	std_logic
gt4_rxdfelfhold_i	std_logic
gt4_rxlpmlfhold_i	std_logic
gt4_rxlpmhfhold_i	std_logic
gt5_txpmaresetdone_i	std_logic
gt5_rxpmaresetdone_i	std_logic
gt5_txresetdone_i	std_logic
gt5_rxresetdone_i	std_logic
gt5_txresetdone_ii	std_logic
gt5_rxresetdone_ii	std_logic
gt5_gttxreset_i	std_logic
gt5_gttxreset_t	std_logic
gt5_gtrxreset_i	std_logic
gt5_gtrxreset_t	std_logic
gt5_txuserrdy_i	std_logic
gt5_txuserrdy_t	std_logic
gt5_rxuserrdy_i	std_logic
gt5_rxuserrdy_t	std_logic
gt5_rxdfeagchold_i	std_logic
gt5_rxdfelfhold_i	std_logic
gt5_rxlpmlfhold_i	std_logic
gt5_rxlpmhfhold_i	std_logic
gt6_txpmaresetdone_i	std_logic
gt6_rxpmaresetdone_i	std_logic
gt6_txresetdone_i	std_logic
gt6_rxresetdone_i	std_logic
gt6_txresetdone_ii	std_logic
gt6_rxresetdone_ii	std_logic
gt6_gttxreset_i	std_logic
gt6_gttxreset_t	std_logic
gt6_gtrxreset_i	std_logic
gt6_gtrxreset_t	std_logic
gt6_txuserrdy_i	std_logic
gt6_txuserrdy_t	std_logic
gt6_rxuserrdy_i	std_logic
gt6_rxuserrdy_t	std_logic
gt6_rxdfeagchold_i	std_logic
gt6_rxdfelfhold_i	std_logic
gt6_rxlpmlfhold_i	std_logic
gt6_rxlpmhfhold_i	std_logic
gt7_txpmaresetdone_i	std_logic
gt7_rxpmaresetdone_i	std_logic
gt7_txresetdone_i	std_logic
gt7_rxresetdone_i	std_logic
gt7_txresetdone_ii	std_logic
gt7_rxresetdone_ii	std_logic
gt7_gttxreset_i	std_logic
gt7_gttxreset_t	std_logic
gt7_gtrxreset_i	std_logic
gt7_gtrxreset_t	std_logic
gt7_txuserrdy_i	std_logic
gt7_txuserrdy_t	std_logic
gt7_rxuserrdy_i	std_logic
gt7_rxuserrdy_t	std_logic
gt7_rxdfeagchold_i	std_logic
gt7_rxdfelfhold_i	std_logic
gt7_rxlpmlfhold_i	std_logic
gt7_rxlpmhfhold_i	std_logic
gt8_txpmaresetdone_i	std_logic
gt8_rxpmaresetdone_i	std_logic
gt8_txresetdone_i	std_logic
gt8_rxresetdone_i	std_logic
gt8_txresetdone_ii	std_logic
gt8_rxresetdone_ii	std_logic
gt8_gttxreset_i	std_logic
gt8_gttxreset_t	std_logic
gt8_gtrxreset_i	std_logic
gt8_gtrxreset_t	std_logic
gt8_txuserrdy_i	std_logic
gt8_txuserrdy_t	std_logic
gt8_rxuserrdy_i	std_logic
gt8_rxuserrdy_t	std_logic
gt8_rxdfeagchold_i	std_logic
gt8_rxdfelfhold_i	std_logic
gt8_rxlpmlfhold_i	std_logic
gt8_rxlpmhfhold_i	std_logic
gt9_txpmaresetdone_i	std_logic
gt9_rxpmaresetdone_i	std_logic
gt9_txresetdone_i	std_logic
gt9_rxresetdone_i	std_logic
gt9_txresetdone_ii	std_logic
gt9_rxresetdone_ii	std_logic
gt9_gttxreset_i	std_logic
gt9_gttxreset_t	std_logic
gt9_gtrxreset_i	std_logic
gt9_gtrxreset_t	std_logic
gt9_txuserrdy_i	std_logic
gt9_txuserrdy_t	std_logic
gt9_rxuserrdy_i	std_logic
gt9_rxuserrdy_t	std_logic
gt9_rxdfeagchold_i	std_logic
gt9_rxdfelfhold_i	std_logic
gt9_rxlpmlfhold_i	std_logic
gt9_rxlpmhfhold_i	std_logic
gt10_txpmaresetdone_i	std_logic
gt10_rxpmaresetdone_i	std_logic
gt10_txresetdone_i	std_logic
gt10_rxresetdone_i	std_logic
gt10_txresetdone_ii	std_logic
gt10_rxresetdone_ii	std_logic
gt10_gttxreset_i	std_logic
gt10_gttxreset_t	std_logic
gt10_gtrxreset_i	std_logic
gt10_gtrxreset_t	std_logic
gt10_txuserrdy_i	std_logic
gt10_txuserrdy_t	std_logic
gt10_rxuserrdy_i	std_logic
gt10_rxuserrdy_t	std_logic
gt10_rxdfeagchold_i	std_logic
gt10_rxdfelfhold_i	std_logic
gt10_rxlpmlfhold_i	std_logic
gt10_rxlpmhfhold_i	std_logic
gt11_txpmaresetdone_i	std_logic
gt11_rxpmaresetdone_i	std_logic
gt11_txresetdone_i	std_logic
gt11_rxresetdone_i	std_logic
gt11_txresetdone_ii	std_logic
gt11_rxresetdone_ii	std_logic
gt11_gttxreset_i	std_logic
gt11_gttxreset_t	std_logic
gt11_gtrxreset_i	std_logic
gt11_gtrxreset_t	std_logic
gt11_txuserrdy_i	std_logic
gt11_txuserrdy_t	std_logic
gt11_rxuserrdy_i	std_logic
gt11_rxuserrdy_t	std_logic
gt11_rxdfeagchold_i	std_logic
gt11_rxdfelfhold_i	std_logic
gt11_rxlpmlfhold_i	std_logic
gt11_rxlpmhfhold_i	std_logic
gt0_qpllreset_i	std_logic
gt0_qpllreset_t	std_logic
gt0_qpllrefclklost_i	std_logic
gt0_qplllock_i	std_logic
gt1_qpllreset_i	std_logic
gt1_qpllreset_t	std_logic
gt1_qpllrefclklost_i	std_logic
gt1_qplllock_i	std_logic
gt2_qpllreset_i	std_logic
gt2_qpllreset_t	std_logic
gt2_qpllrefclklost_i	std_logic
gt2_qplllock_i	std_logic
tied_to_ground_i	std_logic
tied_to_vcc_i	std_logic
gt0_txphaligndone_i	std_logic
gt0_txdlysreset_i	std_logic
gt0_txdlysresetdone_i	std_logic
gt0_txphdlyreset_i	std_logic
gt0_txphalignen_i	std_logic
gt0_txdlyen_i	std_logic
gt0_txphalign_i	std_logic
gt0_txphinit_i	std_logic
gt0_txphinitdone_i	std_logic
gt0_run_tx_phalignment_i	std_logic
gt0_rst_tx_phalignment_i	std_logic
gt0_tx_phalignment_done_i	std_logic
gt0_txsyncallin_i	std_logic
gt0_txsyncin_i	std_logic
gt0_txsyncmode_i	std_logic
gt0_txsyncout_i	std_logic
gt0_txsyncdone_i	std_logic
gt0_txoutclk_i	std_logic
gt0_rxoutclk_i	std_logic
gt0_rxoutclk_i2	std_logic
gt0_txoutclk_i2	std_logic
gt0_recclk_stable_i	std_logic
gt0_rx_cdrlocked	std_logic
gt0_rx_cdrlock_counter	integer range 0 to WAIT_TIME_CDRLOCK := 0
gt0_rxphaligndone_i	std_logic
gt0_rxdlysreset_i	std_logic
gt0_rxdlysresetdone_i	std_logic
gt0_rxphdlyreset_i	std_logic
gt0_rxphalignen_i	std_logic
gt0_rxdlyen_i	std_logic
gt0_rxphalign_i	std_logic
gt0_run_rx_phalignment_i	std_logic
gt0_rst_rx_phalignment_i	std_logic
gt0_rx_phalignment_done_i	std_logic
gt0_rxsyncallin_i	std_logic
gt0_rxsyncin_i	std_logic
gt0_rxsyncmode_i	std_logic
gt0_rxsyncout_i	std_logic
gt0_rxsyncdone_i	std_logic
gt1_txphaligndone_i	std_logic
gt1_txdlysreset_i	std_logic
gt1_txdlysresetdone_i	std_logic
gt1_txphdlyreset_i	std_logic
gt1_txphalignen_i	std_logic
gt1_txdlyen_i	std_logic
gt1_txphalign_i	std_logic
gt1_txphinit_i	std_logic
gt1_txphinitdone_i	std_logic
gt1_run_tx_phalignment_i	std_logic
gt1_rst_tx_phalignment_i	std_logic
gt1_tx_phalignment_done_i	std_logic
gt1_txsyncallin_i	std_logic
gt1_txsyncin_i	std_logic
gt1_txsyncmode_i	std_logic
gt1_txsyncout_i	std_logic
gt1_txsyncdone_i	std_logic
gt1_txoutclk_i	std_logic
gt1_rxoutclk_i	std_logic
gt1_rxoutclk_i2	std_logic
gt1_txoutclk_i2	std_logic
gt1_recclk_stable_i	std_logic
gt1_rx_cdrlocked	std_logic
gt1_rx_cdrlock_counter	integer range 0 to WAIT_TIME_CDRLOCK := 0
gt1_rxphaligndone_i	std_logic
gt1_rxdlysreset_i	std_logic
gt1_rxdlysresetdone_i	std_logic
gt1_rxphdlyreset_i	std_logic
gt1_rxphalignen_i	std_logic
gt1_rxdlyen_i	std_logic
gt1_rxphalign_i	std_logic
gt1_run_rx_phalignment_i	std_logic
gt1_rst_rx_phalignment_i	std_logic
gt1_rx_phalignment_done_i	std_logic
gt1_rxsyncallin_i	std_logic
gt1_rxsyncin_i	std_logic
gt1_rxsyncmode_i	std_logic
gt1_rxsyncout_i	std_logic
gt1_rxsyncdone_i	std_logic
gt2_txphaligndone_i	std_logic
gt2_txdlysreset_i	std_logic
gt2_txdlysresetdone_i	std_logic
gt2_txphdlyreset_i	std_logic
gt2_txphalignen_i	std_logic
gt2_txdlyen_i	std_logic
gt2_txphalign_i	std_logic
gt2_txphinit_i	std_logic
gt2_txphinitdone_i	std_logic
gt2_run_tx_phalignment_i	std_logic
gt2_rst_tx_phalignment_i	std_logic
gt2_tx_phalignment_done_i	std_logic
gt2_txsyncallin_i	std_logic
gt2_txsyncin_i	std_logic
gt2_txsyncmode_i	std_logic
gt2_txsyncout_i	std_logic
gt2_txsyncdone_i	std_logic
gt2_txoutclk_i	std_logic
gt2_rxoutclk_i	std_logic
gt2_rxoutclk_i2	std_logic
gt2_txoutclk_i2	std_logic
gt2_recclk_stable_i	std_logic
gt2_rx_cdrlocked	std_logic
gt2_rx_cdrlock_counter	integer range 0 to WAIT_TIME_CDRLOCK := 0
gt2_rxphaligndone_i	std_logic
gt2_rxdlysreset_i	std_logic
gt2_rxdlysresetdone_i	std_logic
gt2_rxphdlyreset_i	std_logic
gt2_rxphalignen_i	std_logic
gt2_rxdlyen_i	std_logic
gt2_rxphalign_i	std_logic
gt2_run_rx_phalignment_i	std_logic
gt2_rst_rx_phalignment_i	std_logic
gt2_rx_phalignment_done_i	std_logic
gt2_rxsyncallin_i	std_logic
gt2_rxsyncin_i	std_logic
gt2_rxsyncmode_i	std_logic
gt2_rxsyncout_i	std_logic
gt2_rxsyncdone_i	std_logic
gt3_txphaligndone_i	std_logic
gt3_txdlysreset_i	std_logic
gt3_txdlysresetdone_i	std_logic
gt3_txphdlyreset_i	std_logic
gt3_txphalignen_i	std_logic
gt3_txdlyen_i	std_logic
gt3_txphalign_i	std_logic
gt3_txphinit_i	std_logic
gt3_txphinitdone_i	std_logic
gt3_run_tx_phalignment_i	std_logic
gt3_rst_tx_phalignment_i	std_logic
gt3_tx_phalignment_done_i	std_logic
gt3_txsyncallin_i	std_logic
gt3_txsyncin_i	std_logic
gt3_txsyncmode_i	std_logic
gt3_txsyncout_i	std_logic
gt3_txsyncdone_i	std_logic
gt3_txoutclk_i	std_logic
gt3_rxoutclk_i	std_logic
gt3_rxoutclk_i2	std_logic
gt3_txoutclk_i2	std_logic
gt3_recclk_stable_i	std_logic
gt3_rx_cdrlocked	std_logic
gt3_rx_cdrlock_counter	integer range 0 to WAIT_TIME_CDRLOCK := 0
gt3_rxphaligndone_i	std_logic
gt3_rxdlysreset_i	std_logic
gt3_rxdlysresetdone_i	std_logic
gt3_rxphdlyreset_i	std_logic
gt3_rxphalignen_i	std_logic
gt3_rxdlyen_i	std_logic
gt3_rxphalign_i	std_logic
gt3_run_rx_phalignment_i	std_logic
gt3_rst_rx_phalignment_i	std_logic
gt3_rx_phalignment_done_i	std_logic
gt3_rxsyncallin_i	std_logic
gt3_rxsyncin_i	std_logic
gt3_rxsyncmode_i	std_logic
gt3_rxsyncout_i	std_logic
gt3_rxsyncdone_i	std_logic
gt4_txphaligndone_i	std_logic
gt4_txdlysreset_i	std_logic
gt4_txdlysresetdone_i	std_logic
gt4_txphdlyreset_i	std_logic
gt4_txphalignen_i	std_logic
gt4_txdlyen_i	std_logic
gt4_txphalign_i	std_logic
gt4_txphinit_i	std_logic
gt4_txphinitdone_i	std_logic
gt4_run_tx_phalignment_i	std_logic
gt4_rst_tx_phalignment_i	std_logic
gt4_tx_phalignment_done_i	std_logic
gt4_txsyncallin_i	std_logic
gt4_txsyncin_i	std_logic
gt4_txsyncmode_i	std_logic
gt4_txsyncout_i	std_logic
gt4_txsyncdone_i	std_logic
gt4_txoutclk_i	std_logic
gt4_rxoutclk_i	std_logic
gt4_rxoutclk_i2	std_logic
gt4_txoutclk_i2	std_logic
gt4_recclk_stable_i	std_logic
gt4_rx_cdrlocked	std_logic
gt4_rx_cdrlock_counter	integer range 0 to WAIT_TIME_CDRLOCK := 0
gt4_rxphaligndone_i	std_logic
gt4_rxdlysreset_i	std_logic
gt4_rxdlysresetdone_i	std_logic
gt4_rxphdlyreset_i	std_logic
gt4_rxphalignen_i	std_logic
gt4_rxdlyen_i	std_logic
gt4_rxphalign_i	std_logic
gt4_run_rx_phalignment_i	std_logic
gt4_rst_rx_phalignment_i	std_logic
gt4_rx_phalignment_done_i	std_logic
gt4_rxsyncallin_i	std_logic
gt4_rxsyncin_i	std_logic
gt4_rxsyncmode_i	std_logic
gt4_rxsyncout_i	std_logic
gt4_rxsyncdone_i	std_logic
gt5_txphaligndone_i	std_logic
gt5_txdlysreset_i	std_logic
gt5_txdlysresetdone_i	std_logic
gt5_txphdlyreset_i	std_logic
gt5_txphalignen_i	std_logic
gt5_txdlyen_i	std_logic
gt5_txphalign_i	std_logic
gt5_txphinit_i	std_logic
gt5_txphinitdone_i	std_logic
gt5_run_tx_phalignment_i	std_logic
gt5_rst_tx_phalignment_i	std_logic
gt5_tx_phalignment_done_i	std_logic
gt5_txsyncallin_i	std_logic
gt5_txsyncin_i	std_logic
gt5_txsyncmode_i	std_logic
gt5_txsyncout_i	std_logic
gt5_txsyncdone_i	std_logic
gt5_txoutclk_i	std_logic
gt5_rxoutclk_i	std_logic
gt5_rxoutclk_i2	std_logic
gt5_txoutclk_i2	std_logic
gt5_recclk_stable_i	std_logic
gt5_rx_cdrlocked	std_logic
gt5_rx_cdrlock_counter	integer range 0 to WAIT_TIME_CDRLOCK := 0
gt5_rxphaligndone_i	std_logic
gt5_rxdlysreset_i	std_logic
gt5_rxdlysresetdone_i	std_logic
gt5_rxphdlyreset_i	std_logic
gt5_rxphalignen_i	std_logic
gt5_rxdlyen_i	std_logic
gt5_rxphalign_i	std_logic
gt5_run_rx_phalignment_i	std_logic
gt5_rst_rx_phalignment_i	std_logic
gt5_rx_phalignment_done_i	std_logic
gt5_rxsyncallin_i	std_logic
gt5_rxsyncin_i	std_logic
gt5_rxsyncmode_i	std_logic
gt5_rxsyncout_i	std_logic
gt5_rxsyncdone_i	std_logic
gt6_txphaligndone_i	std_logic
gt6_txdlysreset_i	std_logic
gt6_txdlysresetdone_i	std_logic
gt6_txphdlyreset_i	std_logic
gt6_txphalignen_i	std_logic
gt6_txdlyen_i	std_logic
gt6_txphalign_i	std_logic
gt6_txphinit_i	std_logic
gt6_txphinitdone_i	std_logic
gt6_run_tx_phalignment_i	std_logic
gt6_rst_tx_phalignment_i	std_logic
gt6_tx_phalignment_done_i	std_logic
gt6_txsyncallin_i	std_logic
gt6_txsyncin_i	std_logic
gt6_txsyncmode_i	std_logic
gt6_txsyncout_i	std_logic
gt6_txsyncdone_i	std_logic
gt6_txoutclk_i	std_logic
gt6_rxoutclk_i	std_logic
gt6_rxoutclk_i2	std_logic
gt6_txoutclk_i2	std_logic
gt6_recclk_stable_i	std_logic
gt6_rx_cdrlocked	std_logic
gt6_rx_cdrlock_counter	integer range 0 to WAIT_TIME_CDRLOCK := 0
gt6_rxphaligndone_i	std_logic
gt6_rxdlysreset_i	std_logic
gt6_rxdlysresetdone_i	std_logic
gt6_rxphdlyreset_i	std_logic
gt6_rxphalignen_i	std_logic
gt6_rxdlyen_i	std_logic
gt6_rxphalign_i	std_logic
gt6_run_rx_phalignment_i	std_logic
gt6_rst_rx_phalignment_i	std_logic
gt6_rx_phalignment_done_i	std_logic
gt6_rxsyncallin_i	std_logic
gt6_rxsyncin_i	std_logic
gt6_rxsyncmode_i	std_logic
gt6_rxsyncout_i	std_logic
gt6_rxsyncdone_i	std_logic
gt7_txphaligndone_i	std_logic
gt7_txdlysreset_i	std_logic
gt7_txdlysresetdone_i	std_logic
gt7_txphdlyreset_i	std_logic
gt7_txphalignen_i	std_logic
gt7_txdlyen_i	std_logic
gt7_txphalign_i	std_logic
gt7_txphinit_i	std_logic
gt7_txphinitdone_i	std_logic
gt7_run_tx_phalignment_i	std_logic
gt7_rst_tx_phalignment_i	std_logic
gt7_tx_phalignment_done_i	std_logic
gt7_txsyncallin_i	std_logic
gt7_txsyncin_i	std_logic
gt7_txsyncmode_i	std_logic
gt7_txsyncout_i	std_logic
gt7_txsyncdone_i	std_logic
gt7_txoutclk_i	std_logic
gt7_rxoutclk_i	std_logic
gt7_rxoutclk_i2	std_logic
gt7_txoutclk_i2	std_logic
gt7_recclk_stable_i	std_logic
gt7_rx_cdrlocked	std_logic
gt7_rx_cdrlock_counter	integer range 0 to WAIT_TIME_CDRLOCK := 0
gt7_rxphaligndone_i	std_logic
gt7_rxdlysreset_i	std_logic
gt7_rxdlysresetdone_i	std_logic
gt7_rxphdlyreset_i	std_logic
gt7_rxphalignen_i	std_logic
gt7_rxdlyen_i	std_logic
gt7_rxphalign_i	std_logic
gt7_run_rx_phalignment_i	std_logic
gt7_rst_rx_phalignment_i	std_logic
gt7_rx_phalignment_done_i	std_logic
gt7_rxsyncallin_i	std_logic
gt7_rxsyncin_i	std_logic
gt7_rxsyncmode_i	std_logic
gt7_rxsyncout_i	std_logic
gt7_rxsyncdone_i	std_logic
gt8_txphaligndone_i	std_logic
gt8_txdlysreset_i	std_logic
gt8_txdlysresetdone_i	std_logic
gt8_txphdlyreset_i	std_logic
gt8_txphalignen_i	std_logic
gt8_txdlyen_i	std_logic
gt8_txphalign_i	std_logic
gt8_txphinit_i	std_logic
gt8_txphinitdone_i	std_logic
gt8_run_tx_phalignment_i	std_logic
gt8_rst_tx_phalignment_i	std_logic
gt8_tx_phalignment_done_i	std_logic
gt8_txsyncallin_i	std_logic
gt8_txsyncin_i	std_logic
gt8_txsyncmode_i	std_logic
gt8_txsyncout_i	std_logic
gt8_txsyncdone_i	std_logic
gt8_txoutclk_i	std_logic
gt8_rxoutclk_i	std_logic
gt8_rxoutclk_i2	std_logic
gt8_txoutclk_i2	std_logic
gt8_recclk_stable_i	std_logic
gt8_rx_cdrlocked	std_logic
gt8_rx_cdrlock_counter	integer range 0 to WAIT_TIME_CDRLOCK := 0
gt8_rxphaligndone_i	std_logic
gt8_rxdlysreset_i	std_logic
gt8_rxdlysresetdone_i	std_logic
gt8_rxphdlyreset_i	std_logic
gt8_rxphalignen_i	std_logic
gt8_rxdlyen_i	std_logic
gt8_rxphalign_i	std_logic
gt8_run_rx_phalignment_i	std_logic
gt8_rst_rx_phalignment_i	std_logic
gt8_rx_phalignment_done_i	std_logic
gt8_rxsyncallin_i	std_logic
gt8_rxsyncin_i	std_logic
gt8_rxsyncmode_i	std_logic
gt8_rxsyncout_i	std_logic
gt8_rxsyncdone_i	std_logic
gt9_txphaligndone_i	std_logic
gt9_txdlysreset_i	std_logic
gt9_txdlysresetdone_i	std_logic
gt9_txphdlyreset_i	std_logic
gt9_txphalignen_i	std_logic
gt9_txdlyen_i	std_logic
gt9_txphalign_i	std_logic
gt9_txphinit_i	std_logic
gt9_txphinitdone_i	std_logic
gt9_run_tx_phalignment_i	std_logic
gt9_rst_tx_phalignment_i	std_logic
gt9_tx_phalignment_done_i	std_logic
gt9_txsyncallin_i	std_logic
gt9_txsyncin_i	std_logic
gt9_txsyncmode_i	std_logic
gt9_txsyncout_i	std_logic
gt9_txsyncdone_i	std_logic
gt9_txoutclk_i	std_logic
gt9_rxoutclk_i	std_logic
gt9_rxoutclk_i2	std_logic
gt9_txoutclk_i2	std_logic
gt9_recclk_stable_i	std_logic
gt9_rx_cdrlocked	std_logic
gt9_rx_cdrlock_counter	integer range 0 to WAIT_TIME_CDRLOCK := 0
gt9_rxphaligndone_i	std_logic
gt9_rxdlysreset_i	std_logic
gt9_rxdlysresetdone_i	std_logic
gt9_rxphdlyreset_i	std_logic
gt9_rxphalignen_i	std_logic
gt9_rxdlyen_i	std_logic
gt9_rxphalign_i	std_logic
gt9_run_rx_phalignment_i	std_logic
gt9_rst_rx_phalignment_i	std_logic
gt9_rx_phalignment_done_i	std_logic
gt9_rxsyncallin_i	std_logic
gt9_rxsyncin_i	std_logic
gt9_rxsyncmode_i	std_logic
gt9_rxsyncout_i	std_logic
gt9_rxsyncdone_i	std_logic
gt10_txphaligndone_i	std_logic
gt10_txdlysreset_i	std_logic
gt10_txdlysresetdone_i	std_logic
gt10_txphdlyreset_i	std_logic
gt10_txphalignen_i	std_logic
gt10_txdlyen_i	std_logic
gt10_txphalign_i	std_logic
gt10_txphinit_i	std_logic
gt10_txphinitdone_i	std_logic
gt10_run_tx_phalignment_i	std_logic
gt10_rst_tx_phalignment_i	std_logic
gt10_tx_phalignment_done_i	std_logic
gt10_txsyncallin_i	std_logic
gt10_txsyncin_i	std_logic
gt10_txsyncmode_i	std_logic
gt10_txsyncout_i	std_logic
gt10_txsyncdone_i	std_logic
gt10_txoutclk_i	std_logic
gt10_rxoutclk_i	std_logic
gt10_rxoutclk_i2	std_logic
gt10_txoutclk_i2	std_logic
gt10_recclk_stable_i	std_logic
gt10_rx_cdrlocked	std_logic
gt10_rx_cdrlock_counter	integer range 0 to WAIT_TIME_CDRLOCK := 0
gt10_rxphaligndone_i	std_logic
gt10_rxdlysreset_i	std_logic
gt10_rxdlysresetdone_i	std_logic
gt10_rxphdlyreset_i	std_logic
gt10_rxphalignen_i	std_logic
gt10_rxdlyen_i	std_logic
gt10_rxphalign_i	std_logic
gt10_run_rx_phalignment_i	std_logic
gt10_rst_rx_phalignment_i	std_logic
gt10_rx_phalignment_done_i	std_logic
gt10_rxsyncallin_i	std_logic
gt10_rxsyncin_i	std_logic
gt10_rxsyncmode_i	std_logic
gt10_rxsyncout_i	std_logic
gt10_rxsyncdone_i	std_logic
gt11_txphaligndone_i	std_logic
gt11_txdlysreset_i	std_logic
gt11_txdlysresetdone_i	std_logic
gt11_txphdlyreset_i	std_logic
gt11_txphalignen_i	std_logic
gt11_txdlyen_i	std_logic
gt11_txphalign_i	std_logic
gt11_txphinit_i	std_logic
gt11_txphinitdone_i	std_logic
gt11_run_tx_phalignment_i	std_logic
gt11_rst_tx_phalignment_i	std_logic
gt11_tx_phalignment_done_i	std_logic
gt11_txsyncallin_i	std_logic
gt11_txsyncin_i	std_logic
gt11_txsyncmode_i	std_logic
gt11_txsyncout_i	std_logic
gt11_txsyncdone_i	std_logic
gt11_txoutclk_i	std_logic
gt11_rxoutclk_i	std_logic
gt11_rxoutclk_i2	std_logic
gt11_txoutclk_i2	std_logic
gt11_recclk_stable_i	std_logic
gt11_rx_cdrlocked	std_logic
gt11_rx_cdrlock_counter	integer range 0 to WAIT_TIME_CDRLOCK := 0
gt11_rxphaligndone_i	std_logic
gt11_rxdlysreset_i	std_logic
gt11_rxdlysresetdone_i	std_logic
gt11_rxphdlyreset_i	std_logic
gt11_rxphalignen_i	std_logic
gt11_rxdlyen_i	std_logic
gt11_rxphalign_i	std_logic
gt11_run_rx_phalignment_i	std_logic
gt11_rst_rx_phalignment_i	std_logic
gt11_rx_phalignment_done_i	std_logic
gt11_rxsyncallin_i	std_logic
gt11_rxsyncin_i	std_logic
gt11_rxsyncmode_i	std_logic
gt11_rxsyncout_i	std_logic
gt11_rxsyncdone_i	std_logic
mstr0_txsyncallin_i	std_logic
U0_TXDLYEN	std_logic_vector ( 3 downto 0 )
U0_TXDLYSRESET	std_logic_vector ( 3 downto 0 )
U0_TXDLYSRESETDONE	std_logic_vector ( 3 downto 0 )
U0_TXPHINIT	std_logic_vector ( 3 downto 0 )
U0_TXPHINITDONE	std_logic_vector ( 3 downto 0 )
U0_TXPHALIGN	std_logic_vector ( 3 downto 0 )
U0_TXPHALIGNDONE	std_logic_vector ( 3 downto 0 )
U0_run_tx_phalignment_i	std_logic
U0_rst_tx_phalignment_i	std_logic
mstr4_txsyncallin_i	std_logic
U4_TXDLYEN	std_logic_vector ( 3 downto 0 )
U4_TXDLYSRESET	std_logic_vector ( 3 downto 0 )
U4_TXDLYSRESETDONE	std_logic_vector ( 3 downto 0 )
U4_TXPHINIT	std_logic_vector ( 3 downto 0 )
U4_TXPHINITDONE	std_logic_vector ( 3 downto 0 )
U4_TXPHALIGN	std_logic_vector ( 3 downto 0 )
U4_TXPHALIGNDONE	std_logic_vector ( 3 downto 0 )
U4_run_tx_phalignment_i	std_logic
U4_rst_tx_phalignment_i	std_logic
mstr8_txsyncallin_i	std_logic
U8_TXDLYEN	std_logic_vector ( 3 downto 0 )
U8_TXDLYSRESET	std_logic_vector ( 3 downto 0 )
U8_TXDLYSRESETDONE	std_logic_vector ( 3 downto 0 )
U8_TXPHINIT	std_logic_vector ( 3 downto 0 )
U8_TXPHINITDONE	std_logic_vector ( 3 downto 0 )
U8_TXPHALIGN	std_logic_vector ( 3 downto 0 )
U8_TXPHALIGNDONE	std_logic_vector ( 3 downto 0 )
U8_run_tx_phalignment_i	std_logic
U8_rst_tx_phalignment_i	std_logic
rxmstr0_rxsyncallin_i	std_logic
U0_RXDLYEN	std_logic_vector ( 3 downto 0 )
U0_RXDLYSRESET	std_logic_vector ( 3 downto 0 )
U0_RXDLYSRESETDONE	std_logic_vector ( 3 downto 0 )
U0_RXPHALIGN	std_logic_vector ( 3 downto 0 )
U0_RXPHALIGNDONE	std_logic_vector ( 3 downto 0 )
U0_run_rx_phalignment_i	std_logic
U0_rst_rx_phalignment_i	std_logic
rxmstr4_rxsyncallin_i	std_logic
U4_RXDLYEN	std_logic_vector ( 3 downto 0 )
U4_RXDLYSRESET	std_logic_vector ( 3 downto 0 )
U4_RXDLYSRESETDONE	std_logic_vector ( 3 downto 0 )
U4_RXPHALIGN	std_logic_vector ( 3 downto 0 )
U4_RXPHALIGNDONE	std_logic_vector ( 3 downto 0 )
U4_run_rx_phalignment_i	std_logic
U4_rst_rx_phalignment_i	std_logic
rxmstr8_rxsyncallin_i	std_logic
U8_RXDLYEN	std_logic_vector ( 3 downto 0 )
U8_RXDLYSRESET	std_logic_vector ( 3 downto 0 )
U8_RXDLYSRESETDONE	std_logic_vector ( 3 downto 0 )
U8_RXPHALIGN	std_logic_vector ( 3 downto 0 )
U8_RXPHALIGNDONE	std_logic_vector ( 3 downto 0 )
U8_run_rx_phalignment_i	std_logic
U8_rst_rx_phalignment_i	std_logic
rx_cdrlocked	std_logic

Attributes
DowngradeIPIdentifiedWarnings	string
DowngradeIPIdentifiedWarnings	RTL : architecture is " yes "

Instantiations
dss_3quads_11g2_i	DSS_3Quads_11g2_multi_gt <Entity DSS_3Quads_11g2_multi_gt>
gt0_txresetfsm_i	DSS_3Quads_11g2_TX_STARTUP_FSM <Entity DSS_3Quads_11g2_TX_STARTUP_FSM>
gt1_txresetfsm_i	DSS_3Quads_11g2_TX_STARTUP_FSM <Entity DSS_3Quads_11g2_TX_STARTUP_FSM>
gt2_txresetfsm_i	DSS_3Quads_11g2_TX_STARTUP_FSM <Entity DSS_3Quads_11g2_TX_STARTUP_FSM>
gt3_txresetfsm_i	DSS_3Quads_11g2_TX_STARTUP_FSM <Entity DSS_3Quads_11g2_TX_STARTUP_FSM>
gt4_txresetfsm_i	DSS_3Quads_11g2_TX_STARTUP_FSM <Entity DSS_3Quads_11g2_TX_STARTUP_FSM>
gt5_txresetfsm_i	DSS_3Quads_11g2_TX_STARTUP_FSM <Entity DSS_3Quads_11g2_TX_STARTUP_FSM>
gt6_txresetfsm_i	DSS_3Quads_11g2_TX_STARTUP_FSM <Entity DSS_3Quads_11g2_TX_STARTUP_FSM>
gt7_txresetfsm_i	DSS_3Quads_11g2_TX_STARTUP_FSM <Entity DSS_3Quads_11g2_TX_STARTUP_FSM>
gt8_txresetfsm_i	DSS_3Quads_11g2_TX_STARTUP_FSM <Entity DSS_3Quads_11g2_TX_STARTUP_FSM>
gt9_txresetfsm_i	DSS_3Quads_11g2_TX_STARTUP_FSM <Entity DSS_3Quads_11g2_TX_STARTUP_FSM>
gt10_txresetfsm_i	DSS_3Quads_11g2_TX_STARTUP_FSM <Entity DSS_3Quads_11g2_TX_STARTUP_FSM>
gt11_txresetfsm_i	DSS_3Quads_11g2_TX_STARTUP_FSM <Entity DSS_3Quads_11g2_TX_STARTUP_FSM>
gt0_rxresetfsm_i	DSS_3Quads_11g2_RX_STARTUP_FSM <Entity DSS_3Quads_11g2_RX_STARTUP_FSM>
gt1_rxresetfsm_i	DSS_3Quads_11g2_RX_STARTUP_FSM <Entity DSS_3Quads_11g2_RX_STARTUP_FSM>
gt2_rxresetfsm_i	DSS_3Quads_11g2_RX_STARTUP_FSM <Entity DSS_3Quads_11g2_RX_STARTUP_FSM>
gt3_rxresetfsm_i	DSS_3Quads_11g2_RX_STARTUP_FSM <Entity DSS_3Quads_11g2_RX_STARTUP_FSM>
gt4_rxresetfsm_i	DSS_3Quads_11g2_RX_STARTUP_FSM <Entity DSS_3Quads_11g2_RX_STARTUP_FSM>
gt5_rxresetfsm_i	DSS_3Quads_11g2_RX_STARTUP_FSM <Entity DSS_3Quads_11g2_RX_STARTUP_FSM>
gt6_rxresetfsm_i	DSS_3Quads_11g2_RX_STARTUP_FSM <Entity DSS_3Quads_11g2_RX_STARTUP_FSM>
gt7_rxresetfsm_i	DSS_3Quads_11g2_RX_STARTUP_FSM <Entity DSS_3Quads_11g2_RX_STARTUP_FSM>
gt8_rxresetfsm_i	DSS_3Quads_11g2_RX_STARTUP_FSM <Entity DSS_3Quads_11g2_RX_STARTUP_FSM>
gt9_rxresetfsm_i	DSS_3Quads_11g2_RX_STARTUP_FSM <Entity DSS_3Quads_11g2_RX_STARTUP_FSM>
gt10_rxresetfsm_i	DSS_3Quads_11g2_RX_STARTUP_FSM <Entity DSS_3Quads_11g2_RX_STARTUP_FSM>
gt11_rxresetfsm_i	DSS_3Quads_11g2_RX_STARTUP_FSM <Entity DSS_3Quads_11g2_RX_STARTUP_FSM>
gt0_tx_manual_phase_i	DSS_3Quads_11g2_TX_MANUAL_PHASE_ALIGN <Entity DSS_3Quads_11g2_TX_MANUAL_PHASE_ALIGN>
gt4_tx_manual_phase_i	DSS_3Quads_11g2_TX_MANUAL_PHASE_ALIGN <Entity DSS_3Quads_11g2_TX_MANUAL_PHASE_ALIGN>
gt8_tx_manual_phase_i	DSS_3Quads_11g2_TX_MANUAL_PHASE_ALIGN <Entity DSS_3Quads_11g2_TX_MANUAL_PHASE_ALIGN>
gt0_rx_auto_phase_align_i	DSS_3Quads_11g2_AUTO_PHASE_ALIGN <Entity DSS_3Quads_11g2_AUTO_PHASE_ALIGN>
gt1_rx_auto_phase_align_i	DSS_3Quads_11g2_AUTO_PHASE_ALIGN <Entity DSS_3Quads_11g2_AUTO_PHASE_ALIGN>
gt2_rx_auto_phase_align_i	DSS_3Quads_11g2_AUTO_PHASE_ALIGN <Entity DSS_3Quads_11g2_AUTO_PHASE_ALIGN>
gt3_rx_auto_phase_align_i	DSS_3Quads_11g2_AUTO_PHASE_ALIGN <Entity DSS_3Quads_11g2_AUTO_PHASE_ALIGN>
gt4_rx_auto_phase_align_i	DSS_3Quads_11g2_AUTO_PHASE_ALIGN <Entity DSS_3Quads_11g2_AUTO_PHASE_ALIGN>
gt5_rx_auto_phase_align_i	DSS_3Quads_11g2_AUTO_PHASE_ALIGN <Entity DSS_3Quads_11g2_AUTO_PHASE_ALIGN>
gt6_rx_auto_phase_align_i	DSS_3Quads_11g2_AUTO_PHASE_ALIGN <Entity DSS_3Quads_11g2_AUTO_PHASE_ALIGN>
gt7_rx_auto_phase_align_i	DSS_3Quads_11g2_AUTO_PHASE_ALIGN <Entity DSS_3Quads_11g2_AUTO_PHASE_ALIGN>
gt8_rx_auto_phase_align_i	DSS_3Quads_11g2_AUTO_PHASE_ALIGN <Entity DSS_3Quads_11g2_AUTO_PHASE_ALIGN>
gt9_rx_auto_phase_align_i	DSS_3Quads_11g2_AUTO_PHASE_ALIGN <Entity DSS_3Quads_11g2_AUTO_PHASE_ALIGN>
gt10_rx_auto_phase_align_i	DSS_3Quads_11g2_AUTO_PHASE_ALIGN <Entity DSS_3Quads_11g2_AUTO_PHASE_ALIGN>
gt11_rx_auto_phase_align_i	DSS_3Quads_11g2_AUTO_PHASE_ALIGN <Entity DSS_3Quads_11g2_AUTO_PHASE_ALIGN>

Member Function Documentation

◆ get_cdrlock_time()

integer get_cdrlock_time	(		is_sim in in integer
	)

Function

◆ gt0_cdrlock_timeout()

gt0_cdrlock_timeout ( SYSCLK_IN )

◆ gt10_cdrlock_timeout()

gt10_cdrlock_timeout	(		SYSCLK_IN
	)

Process

◆ gt11_cdrlock_timeout()

gt11_cdrlock_timeout	(		SYSCLK_IN
	)

Process

◆ gt1_cdrlock_timeout()

gt1_cdrlock_timeout	(		SYSCLK_IN
	)

Process

◆ gt2_cdrlock_timeout()

gt2_cdrlock_timeout	(		SYSCLK_IN
	)

Process

◆ gt3_cdrlock_timeout()

gt3_cdrlock_timeout	(		SYSCLK_IN
	)

Process

◆ gt4_cdrlock_timeout()

gt4_cdrlock_timeout	(		SYSCLK_IN
	)

Process

◆ gt5_cdrlock_timeout()

gt5_cdrlock_timeout	(		SYSCLK_IN
	)

Process

◆ gt6_cdrlock_timeout()

gt6_cdrlock_timeout	(		SYSCLK_IN
	)

Process

◆ gt7_cdrlock_timeout()

gt7_cdrlock_timeout	(		SYSCLK_IN
	)

Process

◆ gt8_cdrlock_timeout()

gt8_cdrlock_timeout	(		SYSCLK_IN
	)

Process

◆ gt9_cdrlock_timeout()

gt9_cdrlock_timeout	(		SYSCLK_IN
	)

Process

Member Data Documentation

◆ DLY

DLY time := 1 ns

Constant

◆ DowngradeIPIdentifiedWarnings [1/2]

DowngradeIPIdentifiedWarnings string

Attribute

◆ DowngradeIPIdentifiedWarnings [2/2]

DowngradeIPIdentifiedWarnings RTL : architecture is " yes "

Attribute

◆ DSS_3Quads_11g2_AUTO_PHASE_ALIGN

DSS_3Quads_11g2_AUTO_PHASE_ALIGN

Component

◆ dss_3quads_11g2_i

dss_3quads_11g2_i DSS_3Quads_11g2_multi_gt

Instantiation

◆ DSS_3Quads_11g2_multi_gt

DSS_3Quads_11g2_multi_gt

Component

◆ DSS_3Quads_11g2_RX_MANUAL_PHASE_ALIGN

DSS_3Quads_11g2_RX_MANUAL_PHASE_ALIGN

Component

◆ DSS_3Quads_11g2_RX_STARTUP_FSM

DSS_3Quads_11g2_RX_STARTUP_FSM

Component

◆ DSS_3Quads_11g2_TX_MANUAL_PHASE_ALIGN

DSS_3Quads_11g2_TX_MANUAL_PHASE_ALIGN

Component

◆ DSS_3Quads_11g2_TX_STARTUP_FSM

DSS_3Quads_11g2_TX_STARTUP_FSM

Component

◆ gt0_gtrxreset_i

gt0_gtrxreset_i std_logic

Signal

◆ gt0_gtrxreset_t

gt0_gtrxreset_t std_logic

Signal

◆ gt0_gttxreset_i

gt0_gttxreset_i std_logic

Signal

◆ gt0_gttxreset_t

gt0_gttxreset_t std_logic

Signal

◆ gt0_qplllock_i

gt0_qplllock_i std_logic

Signal

◆ gt0_qpllrefclklost_i

gt0_qpllrefclklost_i std_logic

Signal

◆ gt0_qpllreset_i

gt0_qpllreset_i std_logic

Signal

◆ gt0_qpllreset_t

gt0_qpllreset_t std_logic

Signal

◆ gt0_recclk_stable_i

gt0_recclk_stable_i std_logic

Signal

◆ gt0_rst_rx_phalignment_i

gt0_rst_rx_phalignment_i std_logic

Signal

◆ gt0_rst_tx_phalignment_i

gt0_rst_tx_phalignment_i std_logic

Signal

◆ gt0_run_rx_phalignment_i

gt0_run_rx_phalignment_i std_logic

Signal

◆ gt0_run_tx_phalignment_i

gt0_run_tx_phalignment_i std_logic

Signal

◆ gt0_rx_auto_phase_align_i

gt0_rx_auto_phase_align_i DSS_3Quads_11g2_AUTO_PHASE_ALIGN

Instantiation

◆ gt0_rx_cdrlock_counter

gt0_rx_cdrlock_counter integer range 0 to WAIT_TIME_CDRLOCK := 0

Signal

◆ gt0_rx_cdrlocked

gt0_rx_cdrlocked std_logic

Signal

◆ gt0_rx_phalignment_done_i

gt0_rx_phalignment_done_i std_logic

Signal

◆ gt0_rxdfeagchold_i

gt0_rxdfeagchold_i std_logic

Signal

◆ gt0_rxdfelfhold_i

gt0_rxdfelfhold_i std_logic

Signal

◆ gt0_rxdlyen_i

gt0_rxdlyen_i std_logic

Signal

◆ gt0_rxdlysreset_i

gt0_rxdlysreset_i std_logic

Signal

◆ gt0_rxdlysresetdone_i

gt0_rxdlysresetdone_i std_logic

Signal

◆ gt0_rxlpmhfhold_i

gt0_rxlpmhfhold_i std_logic

Signal

◆ gt0_rxlpmlfhold_i

gt0_rxlpmlfhold_i std_logic

Signal

◆ gt0_rxoutclk_i

gt0_rxoutclk_i std_logic

Signal

◆ gt0_rxoutclk_i2

gt0_rxoutclk_i2 std_logic

Signal

◆ gt0_rxphalign_i

gt0_rxphalign_i std_logic

Signal

◆ gt0_rxphaligndone_i

gt0_rxphaligndone_i std_logic

Signal

◆ gt0_rxphalignen_i

gt0_rxphalignen_i std_logic

Signal

◆ gt0_rxphdlyreset_i

gt0_rxphdlyreset_i std_logic

Signal

◆ gt0_rxpmaresetdone_i

gt0_rxpmaresetdone_i std_logic

Signal

◆ gt0_rxresetdone_i

gt0_rxresetdone_i std_logic

Signal

◆ gt0_rxresetdone_ii

gt0_rxresetdone_ii std_logic

Signal

◆ gt0_rxresetfsm_i

gt0_rxresetfsm_i DSS_3Quads_11g2_RX_STARTUP_FSM

Instantiation

◆ gt0_rxsyncallin_i

gt0_rxsyncallin_i std_logic

Signal

◆ gt0_rxsyncdone_i

gt0_rxsyncdone_i std_logic

Signal

◆ gt0_rxsyncin_i

gt0_rxsyncin_i std_logic

Signal

◆ gt0_rxsyncmode_i

gt0_rxsyncmode_i std_logic

Signal

◆ gt0_rxsyncout_i

gt0_rxsyncout_i std_logic

Signal

◆ gt0_rxuserrdy_i

gt0_rxuserrdy_i std_logic

Signal

◆ gt0_rxuserrdy_t

gt0_rxuserrdy_t std_logic

Signal

◆ gt0_tx_manual_phase_i

gt0_tx_manual_phase_i DSS_3Quads_11g2_TX_MANUAL_PHASE_ALIGN

Instantiation

◆ gt0_tx_phalignment_done_i

gt0_tx_phalignment_done_i std_logic

Signal

◆ gt0_txdlyen_i

gt0_txdlyen_i std_logic

Signal

◆ gt0_txdlysreset_i

gt0_txdlysreset_i std_logic

Signal

◆ gt0_txdlysresetdone_i

gt0_txdlysresetdone_i std_logic

Signal

◆ gt0_txoutclk_i

gt0_txoutclk_i std_logic

Signal

◆ gt0_txoutclk_i2

gt0_txoutclk_i2 std_logic

Signal

◆ gt0_txphalign_i

gt0_txphalign_i std_logic

Signal

◆ gt0_txphaligndone_i

gt0_txphaligndone_i std_logic

Signal

◆ gt0_txphalignen_i

gt0_txphalignen_i std_logic

Signal

◆ gt0_txphdlyreset_i

gt0_txphdlyreset_i std_logic

Signal

◆ gt0_txphinit_i

gt0_txphinit_i std_logic

Signal

◆ gt0_txphinitdone_i

gt0_txphinitdone_i std_logic

Signal

◆ gt0_txpmaresetdone_i

gt0_txpmaresetdone_i std_logic

Signal

◆ gt0_txresetdone_i

gt0_txresetdone_i std_logic

Signal

◆ gt0_txresetdone_ii

gt0_txresetdone_ii std_logic

Signal

◆ gt0_txresetfsm_i

gt0_txresetfsm_i DSS_3Quads_11g2_TX_STARTUP_FSM

Instantiation

◆ gt0_txsyncallin_i

gt0_txsyncallin_i std_logic

Signal

◆ gt0_txsyncdone_i

gt0_txsyncdone_i std_logic

Signal

◆ gt0_txsyncin_i

gt0_txsyncin_i std_logic

Signal

◆ gt0_txsyncmode_i

gt0_txsyncmode_i std_logic

Signal

◆ gt0_txsyncout_i

gt0_txsyncout_i std_logic

Signal

◆ gt0_txuserrdy_i

gt0_txuserrdy_i std_logic

Signal

◆ gt0_txuserrdy_t

gt0_txuserrdy_t std_logic

Signal

◆ gt10_gtrxreset_i

gt10_gtrxreset_i std_logic

Signal

◆ gt10_gtrxreset_t

gt10_gtrxreset_t std_logic

Signal

◆ gt10_gttxreset_i

gt10_gttxreset_i std_logic

Signal

◆ gt10_gttxreset_t

gt10_gttxreset_t std_logic

Signal

◆ gt10_recclk_stable_i

gt10_recclk_stable_i std_logic

Signal

◆ gt10_rst_rx_phalignment_i

gt10_rst_rx_phalignment_i std_logic

Signal

◆ gt10_rst_tx_phalignment_i

gt10_rst_tx_phalignment_i std_logic

Signal

◆ gt10_run_rx_phalignment_i

gt10_run_rx_phalignment_i std_logic

Signal

◆ gt10_run_tx_phalignment_i

gt10_run_tx_phalignment_i std_logic

Signal

◆ gt10_rx_auto_phase_align_i

gt10_rx_auto_phase_align_i DSS_3Quads_11g2_AUTO_PHASE_ALIGN

Instantiation

◆ gt10_rx_cdrlock_counter

gt10_rx_cdrlock_counter integer range 0 to WAIT_TIME_CDRLOCK := 0

Signal

◆ gt10_rx_cdrlocked

gt10_rx_cdrlocked std_logic

Signal

◆ gt10_rx_phalignment_done_i

gt10_rx_phalignment_done_i std_logic

Signal

◆ gt10_rxdfeagchold_i

gt10_rxdfeagchold_i std_logic

Signal

◆ gt10_rxdfelfhold_i

gt10_rxdfelfhold_i std_logic

Signal

◆ gt10_rxdlyen_i

gt10_rxdlyen_i std_logic

Signal

◆ gt10_rxdlysreset_i

gt10_rxdlysreset_i std_logic

Signal

◆ gt10_rxdlysresetdone_i

gt10_rxdlysresetdone_i std_logic

Signal

◆ gt10_rxlpmhfhold_i

gt10_rxlpmhfhold_i std_logic

Signal

◆ gt10_rxlpmlfhold_i

gt10_rxlpmlfhold_i std_logic

Signal

◆ gt10_rxoutclk_i

gt10_rxoutclk_i std_logic

Signal

◆ gt10_rxoutclk_i2

gt10_rxoutclk_i2 std_logic

Signal

◆ gt10_rxphalign_i

gt10_rxphalign_i std_logic

Signal

◆ gt10_rxphaligndone_i

gt10_rxphaligndone_i std_logic

Signal

◆ gt10_rxphalignen_i

gt10_rxphalignen_i std_logic

Signal

◆ gt10_rxphdlyreset_i

gt10_rxphdlyreset_i std_logic

Signal

◆ gt10_rxpmaresetdone_i

gt10_rxpmaresetdone_i std_logic

Signal

◆ gt10_rxresetdone_i

gt10_rxresetdone_i std_logic

Signal

◆ gt10_rxresetdone_ii

gt10_rxresetdone_ii std_logic

Signal

◆ gt10_rxresetfsm_i

gt10_rxresetfsm_i DSS_3Quads_11g2_RX_STARTUP_FSM

Instantiation

◆ gt10_rxsyncallin_i

gt10_rxsyncallin_i std_logic

Signal

◆ gt10_rxsyncdone_i

gt10_rxsyncdone_i std_logic

Signal

◆ gt10_rxsyncin_i

gt10_rxsyncin_i std_logic

Signal

◆ gt10_rxsyncmode_i

gt10_rxsyncmode_i std_logic

Signal

◆ gt10_rxsyncout_i

gt10_rxsyncout_i std_logic

Signal

◆ gt10_rxuserrdy_i

gt10_rxuserrdy_i std_logic

Signal

◆ gt10_rxuserrdy_t

gt10_rxuserrdy_t std_logic

Signal

◆ gt10_tx_phalignment_done_i

gt10_tx_phalignment_done_i std_logic

Signal

◆ gt10_txdlyen_i

gt10_txdlyen_i std_logic

Signal

◆ gt10_txdlysreset_i

gt10_txdlysreset_i std_logic

Signal

◆ gt10_txdlysresetdone_i

gt10_txdlysresetdone_i std_logic

Signal

◆ gt10_txoutclk_i

gt10_txoutclk_i std_logic

Signal

◆ gt10_txoutclk_i2

gt10_txoutclk_i2 std_logic

Signal

◆ gt10_txphalign_i

gt10_txphalign_i std_logic

Signal

◆ gt10_txphaligndone_i

gt10_txphaligndone_i std_logic

Signal

◆ gt10_txphalignen_i

gt10_txphalignen_i std_logic

Signal

◆ gt10_txphdlyreset_i

gt10_txphdlyreset_i std_logic

Signal

◆ gt10_txphinit_i

gt10_txphinit_i std_logic

Signal

◆ gt10_txphinitdone_i

gt10_txphinitdone_i std_logic

Signal

◆ gt10_txpmaresetdone_i

gt10_txpmaresetdone_i std_logic

Signal

◆ gt10_txresetdone_i

gt10_txresetdone_i std_logic

Signal

◆ gt10_txresetdone_ii

gt10_txresetdone_ii std_logic

Signal

◆ gt10_txresetfsm_i

gt10_txresetfsm_i DSS_3Quads_11g2_TX_STARTUP_FSM

Instantiation

◆ gt10_txsyncallin_i

gt10_txsyncallin_i std_logic

Signal

◆ gt10_txsyncdone_i

gt10_txsyncdone_i std_logic

Signal

◆ gt10_txsyncin_i

gt10_txsyncin_i std_logic

Signal

◆ gt10_txsyncmode_i

gt10_txsyncmode_i std_logic

Signal

◆ gt10_txsyncout_i

gt10_txsyncout_i std_logic

Signal

◆ gt10_txuserrdy_i

gt10_txuserrdy_i std_logic

Signal

◆ gt10_txuserrdy_t

gt10_txuserrdy_t std_logic

Signal

◆ gt11_gtrxreset_i

gt11_gtrxreset_i std_logic

Signal

◆ gt11_gtrxreset_t

gt11_gtrxreset_t std_logic

Signal

◆ gt11_gttxreset_i

gt11_gttxreset_i std_logic

Signal

◆ gt11_gttxreset_t

gt11_gttxreset_t std_logic

Signal

◆ gt11_recclk_stable_i

gt11_recclk_stable_i std_logic

Signal

◆ gt11_rst_rx_phalignment_i

gt11_rst_rx_phalignment_i std_logic

Signal

◆ gt11_rst_tx_phalignment_i

gt11_rst_tx_phalignment_i std_logic

Signal

◆ gt11_run_rx_phalignment_i

gt11_run_rx_phalignment_i std_logic

Signal

◆ gt11_run_tx_phalignment_i

gt11_run_tx_phalignment_i std_logic

Signal

◆ gt11_rx_auto_phase_align_i

gt11_rx_auto_phase_align_i DSS_3Quads_11g2_AUTO_PHASE_ALIGN

Instantiation

◆ gt11_rx_cdrlock_counter

gt11_rx_cdrlock_counter integer range 0 to WAIT_TIME_CDRLOCK := 0

Signal

◆ gt11_rx_cdrlocked

gt11_rx_cdrlocked std_logic

Signal

◆ gt11_rx_phalignment_done_i

gt11_rx_phalignment_done_i std_logic

Signal

◆ gt11_rxdfeagchold_i

gt11_rxdfeagchold_i std_logic

Signal

◆ gt11_rxdfelfhold_i

gt11_rxdfelfhold_i std_logic

Signal

◆ gt11_rxdlyen_i

gt11_rxdlyen_i std_logic

Signal

◆ gt11_rxdlysreset_i

gt11_rxdlysreset_i std_logic

Signal

◆ gt11_rxdlysresetdone_i

gt11_rxdlysresetdone_i std_logic

Signal

◆ gt11_rxlpmhfhold_i

gt11_rxlpmhfhold_i std_logic

Signal

◆ gt11_rxlpmlfhold_i

gt11_rxlpmlfhold_i std_logic

Signal

◆ gt11_rxoutclk_i

gt11_rxoutclk_i std_logic

Signal

◆ gt11_rxoutclk_i2

gt11_rxoutclk_i2 std_logic

Signal

◆ gt11_rxphalign_i

gt11_rxphalign_i std_logic

Signal

◆ gt11_rxphaligndone_i

gt11_rxphaligndone_i std_logic

Signal

◆ gt11_rxphalignen_i

gt11_rxphalignen_i std_logic

Signal

◆ gt11_rxphdlyreset_i

gt11_rxphdlyreset_i std_logic

Signal

◆ gt11_rxpmaresetdone_i

gt11_rxpmaresetdone_i std_logic

Signal

◆ gt11_rxresetdone_i

gt11_rxresetdone_i std_logic

Signal

◆ gt11_rxresetdone_ii

gt11_rxresetdone_ii std_logic

Signal

◆ gt11_rxresetfsm_i

gt11_rxresetfsm_i DSS_3Quads_11g2_RX_STARTUP_FSM

Instantiation

◆ gt11_rxsyncallin_i

gt11_rxsyncallin_i std_logic

Signal

◆ gt11_rxsyncdone_i

gt11_rxsyncdone_i std_logic

Signal

◆ gt11_rxsyncin_i

gt11_rxsyncin_i std_logic

Signal

◆ gt11_rxsyncmode_i

gt11_rxsyncmode_i std_logic

Signal

◆ gt11_rxsyncout_i

gt11_rxsyncout_i std_logic

Signal

◆ gt11_rxuserrdy_i

gt11_rxuserrdy_i std_logic

Signal

◆ gt11_rxuserrdy_t

gt11_rxuserrdy_t std_logic

Signal

◆ gt11_tx_phalignment_done_i

gt11_tx_phalignment_done_i std_logic

Signal

◆ gt11_txdlyen_i

gt11_txdlyen_i std_logic

Signal

◆ gt11_txdlysreset_i

gt11_txdlysreset_i std_logic

Signal

◆ gt11_txdlysresetdone_i

gt11_txdlysresetdone_i std_logic

Signal

◆ gt11_txoutclk_i

gt11_txoutclk_i std_logic

Signal

◆ gt11_txoutclk_i2

gt11_txoutclk_i2 std_logic

Signal

◆ gt11_txphalign_i

gt11_txphalign_i std_logic

Signal

◆ gt11_txphaligndone_i

gt11_txphaligndone_i std_logic

Signal

◆ gt11_txphalignen_i

gt11_txphalignen_i std_logic

Signal

◆ gt11_txphdlyreset_i

gt11_txphdlyreset_i std_logic

Signal

◆ gt11_txphinit_i

gt11_txphinit_i std_logic

Signal

◆ gt11_txphinitdone_i

gt11_txphinitdone_i std_logic

Signal

◆ gt11_txpmaresetdone_i

gt11_txpmaresetdone_i std_logic

Signal

◆ gt11_txresetdone_i

gt11_txresetdone_i std_logic

Signal

◆ gt11_txresetdone_ii

gt11_txresetdone_ii std_logic

Signal

◆ gt11_txresetfsm_i

gt11_txresetfsm_i DSS_3Quads_11g2_TX_STARTUP_FSM

Instantiation

◆ gt11_txsyncallin_i

gt11_txsyncallin_i std_logic

Signal

◆ gt11_txsyncdone_i

gt11_txsyncdone_i std_logic

Signal

◆ gt11_txsyncin_i

gt11_txsyncin_i std_logic

Signal

◆ gt11_txsyncmode_i

gt11_txsyncmode_i std_logic

Signal

◆ gt11_txsyncout_i

gt11_txsyncout_i std_logic

Signal

◆ gt11_txuserrdy_i

gt11_txuserrdy_i std_logic

Signal

◆ gt11_txuserrdy_t

gt11_txuserrdy_t std_logic

Signal

◆ gt1_gtrxreset_i

gt1_gtrxreset_i std_logic

Signal

◆ gt1_gtrxreset_t

gt1_gtrxreset_t std_logic

Signal

◆ gt1_gttxreset_i

gt1_gttxreset_i std_logic

Signal

◆ gt1_gttxreset_t

gt1_gttxreset_t std_logic

Signal

◆ gt1_qplllock_i

gt1_qplllock_i std_logic

Signal

◆ gt1_qpllrefclklost_i

gt1_qpllrefclklost_i std_logic

Signal

◆ gt1_qpllreset_i

gt1_qpllreset_i std_logic

Signal

◆ gt1_qpllreset_t

gt1_qpllreset_t std_logic

Signal

◆ gt1_recclk_stable_i

gt1_recclk_stable_i std_logic

Signal

◆ gt1_rst_rx_phalignment_i

gt1_rst_rx_phalignment_i std_logic

Signal

◆ gt1_rst_tx_phalignment_i

gt1_rst_tx_phalignment_i std_logic

Signal

◆ gt1_run_rx_phalignment_i

gt1_run_rx_phalignment_i std_logic

Signal

◆ gt1_run_tx_phalignment_i

gt1_run_tx_phalignment_i std_logic

Signal

◆ gt1_rx_auto_phase_align_i

gt1_rx_auto_phase_align_i DSS_3Quads_11g2_AUTO_PHASE_ALIGN

Instantiation

◆ gt1_rx_cdrlock_counter

gt1_rx_cdrlock_counter integer range 0 to WAIT_TIME_CDRLOCK := 0

Signal

◆ gt1_rx_cdrlocked

gt1_rx_cdrlocked std_logic

Signal

◆ gt1_rx_phalignment_done_i

gt1_rx_phalignment_done_i std_logic

Signal

◆ gt1_rxdfeagchold_i

gt1_rxdfeagchold_i std_logic

Signal

◆ gt1_rxdfelfhold_i

gt1_rxdfelfhold_i std_logic

Signal

◆ gt1_rxdlyen_i

gt1_rxdlyen_i std_logic

Signal

◆ gt1_rxdlysreset_i

gt1_rxdlysreset_i std_logic

Signal

◆ gt1_rxdlysresetdone_i

gt1_rxdlysresetdone_i std_logic

Signal

◆ gt1_rxlpmhfhold_i

gt1_rxlpmhfhold_i std_logic

Signal

◆ gt1_rxlpmlfhold_i

gt1_rxlpmlfhold_i std_logic

Signal

◆ gt1_rxoutclk_i

gt1_rxoutclk_i std_logic

Signal

◆ gt1_rxoutclk_i2

gt1_rxoutclk_i2 std_logic

Signal

◆ gt1_rxphalign_i

gt1_rxphalign_i std_logic

Signal

◆ gt1_rxphaligndone_i

gt1_rxphaligndone_i std_logic

Signal

◆ gt1_rxphalignen_i

gt1_rxphalignen_i std_logic

Signal

◆ gt1_rxphdlyreset_i

gt1_rxphdlyreset_i std_logic

Signal

◆ gt1_rxpmaresetdone_i

gt1_rxpmaresetdone_i std_logic

Signal

◆ gt1_rxresetdone_i

gt1_rxresetdone_i std_logic

Signal

◆ gt1_rxresetdone_ii

gt1_rxresetdone_ii std_logic

Signal

◆ gt1_rxresetfsm_i

gt1_rxresetfsm_i DSS_3Quads_11g2_RX_STARTUP_FSM

Instantiation

◆ gt1_rxsyncallin_i

gt1_rxsyncallin_i std_logic

Signal

◆ gt1_rxsyncdone_i

gt1_rxsyncdone_i std_logic

Signal

◆ gt1_rxsyncin_i

gt1_rxsyncin_i std_logic

Signal

◆ gt1_rxsyncmode_i

gt1_rxsyncmode_i std_logic

Signal

◆ gt1_rxsyncout_i

gt1_rxsyncout_i std_logic

Signal

◆ gt1_rxuserrdy_i

gt1_rxuserrdy_i std_logic

Signal

◆ gt1_rxuserrdy_t

gt1_rxuserrdy_t std_logic

Signal

◆ gt1_tx_phalignment_done_i

gt1_tx_phalignment_done_i std_logic

Signal

◆ gt1_txdlyen_i

gt1_txdlyen_i std_logic

Signal

◆ gt1_txdlysreset_i

gt1_txdlysreset_i std_logic

Signal

◆ gt1_txdlysresetdone_i

gt1_txdlysresetdone_i std_logic

Signal

◆ gt1_txoutclk_i

gt1_txoutclk_i std_logic

Signal

◆ gt1_txoutclk_i2

gt1_txoutclk_i2 std_logic

Signal

◆ gt1_txphalign_i

gt1_txphalign_i std_logic

Signal

◆ gt1_txphaligndone_i

gt1_txphaligndone_i std_logic

Signal

◆ gt1_txphalignen_i

gt1_txphalignen_i std_logic

Signal

◆ gt1_txphdlyreset_i

gt1_txphdlyreset_i std_logic

Signal

◆ gt1_txphinit_i

gt1_txphinit_i std_logic

Signal

◆ gt1_txphinitdone_i

gt1_txphinitdone_i std_logic

Signal

◆ gt1_txpmaresetdone_i

gt1_txpmaresetdone_i std_logic

Signal

◆ gt1_txresetdone_i

gt1_txresetdone_i std_logic

Signal

◆ gt1_txresetdone_ii

gt1_txresetdone_ii std_logic

Signal

◆ gt1_txresetfsm_i

gt1_txresetfsm_i DSS_3Quads_11g2_TX_STARTUP_FSM

Instantiation

◆ gt1_txsyncallin_i

gt1_txsyncallin_i std_logic

Signal

◆ gt1_txsyncdone_i

gt1_txsyncdone_i std_logic

Signal

◆ gt1_txsyncin_i

gt1_txsyncin_i std_logic

Signal

◆ gt1_txsyncmode_i

gt1_txsyncmode_i std_logic

Signal

◆ gt1_txsyncout_i

gt1_txsyncout_i std_logic

Signal

◆ gt1_txuserrdy_i

gt1_txuserrdy_i std_logic

Signal

◆ gt1_txuserrdy_t

gt1_txuserrdy_t std_logic

Signal

◆ gt2_gtrxreset_i

gt2_gtrxreset_i std_logic

Signal

◆ gt2_gtrxreset_t

gt2_gtrxreset_t std_logic

Signal

◆ gt2_gttxreset_i

gt2_gttxreset_i std_logic

Signal

◆ gt2_gttxreset_t

gt2_gttxreset_t std_logic

Signal

◆ gt2_qplllock_i

gt2_qplllock_i std_logic

Signal

◆ gt2_qpllrefclklost_i

gt2_qpllrefclklost_i std_logic

Signal

◆ gt2_qpllreset_i

gt2_qpllreset_i std_logic

Signal

◆ gt2_qpllreset_t

gt2_qpllreset_t std_logic

Signal

◆ gt2_recclk_stable_i

gt2_recclk_stable_i std_logic

Signal

◆ gt2_rst_rx_phalignment_i

gt2_rst_rx_phalignment_i std_logic

Signal

◆ gt2_rst_tx_phalignment_i

gt2_rst_tx_phalignment_i std_logic

Signal

◆ gt2_run_rx_phalignment_i

gt2_run_rx_phalignment_i std_logic

Signal

◆ gt2_run_tx_phalignment_i

gt2_run_tx_phalignment_i std_logic

Signal

◆ gt2_rx_auto_phase_align_i

gt2_rx_auto_phase_align_i DSS_3Quads_11g2_AUTO_PHASE_ALIGN

Instantiation

◆ gt2_rx_cdrlock_counter

gt2_rx_cdrlock_counter integer range 0 to WAIT_TIME_CDRLOCK := 0

Signal

◆ gt2_rx_cdrlocked

gt2_rx_cdrlocked std_logic

Signal

◆ gt2_rx_phalignment_done_i

gt2_rx_phalignment_done_i std_logic

Signal

◆ gt2_rxdfeagchold_i

gt2_rxdfeagchold_i std_logic

Signal

◆ gt2_rxdfelfhold_i

gt2_rxdfelfhold_i std_logic

Signal

◆ gt2_rxdlyen_i

gt2_rxdlyen_i std_logic

Signal

◆ gt2_rxdlysreset_i

gt2_rxdlysreset_i std_logic

Signal

◆ gt2_rxdlysresetdone_i

gt2_rxdlysresetdone_i std_logic

Signal

◆ gt2_rxlpmhfhold_i

gt2_rxlpmhfhold_i std_logic

Signal

◆ gt2_rxlpmlfhold_i

gt2_rxlpmlfhold_i std_logic

Signal

◆ gt2_rxoutclk_i

gt2_rxoutclk_i std_logic

Signal

◆ gt2_rxoutclk_i2

gt2_rxoutclk_i2 std_logic

Signal

◆ gt2_rxphalign_i

gt2_rxphalign_i std_logic

Signal

◆ gt2_rxphaligndone_i

gt2_rxphaligndone_i std_logic

Signal

◆ gt2_rxphalignen_i

gt2_rxphalignen_i std_logic

Signal

◆ gt2_rxphdlyreset_i

gt2_rxphdlyreset_i std_logic

Signal

◆ gt2_rxpmaresetdone_i

gt2_rxpmaresetdone_i std_logic

Signal

◆ gt2_rxresetdone_i

gt2_rxresetdone_i std_logic

Signal

◆ gt2_rxresetdone_ii

gt2_rxresetdone_ii std_logic

Signal

◆ gt2_rxresetfsm_i

gt2_rxresetfsm_i DSS_3Quads_11g2_RX_STARTUP_FSM

Instantiation

◆ gt2_rxsyncallin_i

gt2_rxsyncallin_i std_logic

Signal

◆ gt2_rxsyncdone_i

gt2_rxsyncdone_i std_logic

Signal

◆ gt2_rxsyncin_i

gt2_rxsyncin_i std_logic

Signal

◆ gt2_rxsyncmode_i

gt2_rxsyncmode_i std_logic

Signal

◆ gt2_rxsyncout_i

gt2_rxsyncout_i std_logic

Signal

◆ gt2_rxuserrdy_i

gt2_rxuserrdy_i std_logic

Signal

◆ gt2_rxuserrdy_t

gt2_rxuserrdy_t std_logic

Signal

◆ gt2_tx_phalignment_done_i

gt2_tx_phalignment_done_i std_logic

Signal

◆ gt2_txdlyen_i

gt2_txdlyen_i std_logic

Signal

◆ gt2_txdlysreset_i

gt2_txdlysreset_i std_logic

Signal

◆ gt2_txdlysresetdone_i

gt2_txdlysresetdone_i std_logic

Signal

◆ gt2_txoutclk_i

gt2_txoutclk_i std_logic

Signal

◆ gt2_txoutclk_i2

gt2_txoutclk_i2 std_logic

Signal

◆ gt2_txphalign_i

gt2_txphalign_i std_logic

Signal

◆ gt2_txphaligndone_i

gt2_txphaligndone_i std_logic

Signal

◆ gt2_txphalignen_i

gt2_txphalignen_i std_logic

Signal

◆ gt2_txphdlyreset_i

gt2_txphdlyreset_i std_logic

Signal

◆ gt2_txphinit_i

gt2_txphinit_i std_logic

Signal

◆ gt2_txphinitdone_i

gt2_txphinitdone_i std_logic

Signal

◆ gt2_txpmaresetdone_i

gt2_txpmaresetdone_i std_logic

Signal

◆ gt2_txresetdone_i

gt2_txresetdone_i std_logic

Signal

◆ gt2_txresetdone_ii

gt2_txresetdone_ii std_logic

Signal

◆ gt2_txresetfsm_i

gt2_txresetfsm_i DSS_3Quads_11g2_TX_STARTUP_FSM

Instantiation

◆ gt2_txsyncallin_i

gt2_txsyncallin_i std_logic

Signal

◆ gt2_txsyncdone_i

gt2_txsyncdone_i std_logic

Signal

◆ gt2_txsyncin_i

gt2_txsyncin_i std_logic

Signal

◆ gt2_txsyncmode_i

gt2_txsyncmode_i std_logic

Signal

◆ gt2_txsyncout_i

gt2_txsyncout_i std_logic

Signal

◆ gt2_txuserrdy_i

gt2_txuserrdy_i std_logic

Signal

◆ gt2_txuserrdy_t

gt2_txuserrdy_t std_logic

Signal

◆ gt3_gtrxreset_i

gt3_gtrxreset_i std_logic

Signal

◆ gt3_gtrxreset_t

gt3_gtrxreset_t std_logic

Signal

◆ gt3_gttxreset_i

gt3_gttxreset_i std_logic

Signal

◆ gt3_gttxreset_t

gt3_gttxreset_t std_logic

Signal

◆ gt3_recclk_stable_i

gt3_recclk_stable_i std_logic

Signal

◆ gt3_rst_rx_phalignment_i

gt3_rst_rx_phalignment_i std_logic

Signal

◆ gt3_rst_tx_phalignment_i

gt3_rst_tx_phalignment_i std_logic

Signal

◆ gt3_run_rx_phalignment_i

gt3_run_rx_phalignment_i std_logic

Signal

◆ gt3_run_tx_phalignment_i

gt3_run_tx_phalignment_i std_logic

Signal

◆ gt3_rx_auto_phase_align_i

gt3_rx_auto_phase_align_i DSS_3Quads_11g2_AUTO_PHASE_ALIGN

Instantiation

◆ gt3_rx_cdrlock_counter

gt3_rx_cdrlock_counter integer range 0 to WAIT_TIME_CDRLOCK := 0

Signal

◆ gt3_rx_cdrlocked

gt3_rx_cdrlocked std_logic

Signal

◆ gt3_rx_phalignment_done_i

gt3_rx_phalignment_done_i std_logic

Signal

◆ gt3_rxdfeagchold_i

gt3_rxdfeagchold_i std_logic

Signal

◆ gt3_rxdfelfhold_i

gt3_rxdfelfhold_i std_logic

Signal

◆ gt3_rxdlyen_i

gt3_rxdlyen_i std_logic

Signal

◆ gt3_rxdlysreset_i

gt3_rxdlysreset_i std_logic

Signal

◆ gt3_rxdlysresetdone_i

gt3_rxdlysresetdone_i std_logic

Signal

◆ gt3_rxlpmhfhold_i

gt3_rxlpmhfhold_i std_logic

Signal

◆ gt3_rxlpmlfhold_i

gt3_rxlpmlfhold_i std_logic

Signal

◆ gt3_rxoutclk_i

gt3_rxoutclk_i std_logic

Signal

◆ gt3_rxoutclk_i2

gt3_rxoutclk_i2 std_logic

Signal

◆ gt3_rxphalign_i

gt3_rxphalign_i std_logic

Signal

◆ gt3_rxphaligndone_i

gt3_rxphaligndone_i std_logic

Signal

◆ gt3_rxphalignen_i

gt3_rxphalignen_i std_logic

Signal

◆ gt3_rxphdlyreset_i

gt3_rxphdlyreset_i std_logic

Signal

◆ gt3_rxpmaresetdone_i

gt3_rxpmaresetdone_i std_logic

Signal

◆ gt3_rxresetdone_i

gt3_rxresetdone_i std_logic

Signal

◆ gt3_rxresetdone_ii

gt3_rxresetdone_ii std_logic

Signal

◆ gt3_rxresetfsm_i

gt3_rxresetfsm_i DSS_3Quads_11g2_RX_STARTUP_FSM

Instantiation

◆ gt3_rxsyncallin_i

gt3_rxsyncallin_i std_logic

Signal

◆ gt3_rxsyncdone_i

gt3_rxsyncdone_i std_logic

Signal

◆ gt3_rxsyncin_i

gt3_rxsyncin_i std_logic

Signal

◆ gt3_rxsyncmode_i

gt3_rxsyncmode_i std_logic

Signal

◆ gt3_rxsyncout_i

gt3_rxsyncout_i std_logic

Signal

◆ gt3_rxuserrdy_i

gt3_rxuserrdy_i std_logic

Signal

◆ gt3_rxuserrdy_t

gt3_rxuserrdy_t std_logic

Signal

◆ gt3_tx_phalignment_done_i

gt3_tx_phalignment_done_i std_logic

Signal

◆ gt3_txdlyen_i

gt3_txdlyen_i std_logic

Signal

◆ gt3_txdlysreset_i

gt3_txdlysreset_i std_logic

Signal

◆ gt3_txdlysresetdone_i

gt3_txdlysresetdone_i std_logic

Signal

◆ gt3_txoutclk_i

gt3_txoutclk_i std_logic

Signal

◆ gt3_txoutclk_i2

gt3_txoutclk_i2 std_logic

Signal

◆ gt3_txphalign_i

gt3_txphalign_i std_logic

Signal

◆ gt3_txphaligndone_i

gt3_txphaligndone_i std_logic

Signal

◆ gt3_txphalignen_i

gt3_txphalignen_i std_logic

Signal

◆ gt3_txphdlyreset_i

gt3_txphdlyreset_i std_logic

Signal

◆ gt3_txphinit_i

gt3_txphinit_i std_logic

Signal

◆ gt3_txphinitdone_i

gt3_txphinitdone_i std_logic

Signal

◆ gt3_txpmaresetdone_i

gt3_txpmaresetdone_i std_logic

Signal

◆ gt3_txresetdone_i

gt3_txresetdone_i std_logic

Signal

◆ gt3_txresetdone_ii

gt3_txresetdone_ii std_logic

Signal

◆ gt3_txresetfsm_i

gt3_txresetfsm_i DSS_3Quads_11g2_TX_STARTUP_FSM

Instantiation

◆ gt3_txsyncallin_i

gt3_txsyncallin_i std_logic

Signal

◆ gt3_txsyncdone_i

gt3_txsyncdone_i std_logic

Signal

◆ gt3_txsyncin_i

gt3_txsyncin_i std_logic

Signal

◆ gt3_txsyncmode_i

gt3_txsyncmode_i std_logic

Signal

◆ gt3_txsyncout_i

gt3_txsyncout_i std_logic

Signal

◆ gt3_txuserrdy_i

gt3_txuserrdy_i std_logic

Signal

◆ gt3_txuserrdy_t

gt3_txuserrdy_t std_logic

Signal

◆ gt4_gtrxreset_i

gt4_gtrxreset_i std_logic

Signal

◆ gt4_gtrxreset_t

gt4_gtrxreset_t std_logic

Signal

◆ gt4_gttxreset_i

gt4_gttxreset_i std_logic

Signal

◆ gt4_gttxreset_t

gt4_gttxreset_t std_logic

Signal

◆ gt4_recclk_stable_i

gt4_recclk_stable_i std_logic

Signal

◆ gt4_rst_rx_phalignment_i

gt4_rst_rx_phalignment_i std_logic

Signal

◆ gt4_rst_tx_phalignment_i

gt4_rst_tx_phalignment_i std_logic

Signal

◆ gt4_run_rx_phalignment_i

gt4_run_rx_phalignment_i std_logic

Signal

◆ gt4_run_tx_phalignment_i

gt4_run_tx_phalignment_i std_logic

Signal

◆ gt4_rx_auto_phase_align_i

gt4_rx_auto_phase_align_i DSS_3Quads_11g2_AUTO_PHASE_ALIGN

Instantiation

◆ gt4_rx_cdrlock_counter

gt4_rx_cdrlock_counter integer range 0 to WAIT_TIME_CDRLOCK := 0

Signal

◆ gt4_rx_cdrlocked

gt4_rx_cdrlocked std_logic

Signal

◆ gt4_rx_phalignment_done_i

gt4_rx_phalignment_done_i std_logic

Signal

◆ gt4_rxdfeagchold_i

gt4_rxdfeagchold_i std_logic

Signal

◆ gt4_rxdfelfhold_i

gt4_rxdfelfhold_i std_logic

Signal

◆ gt4_rxdlyen_i

gt4_rxdlyen_i std_logic

Signal

◆ gt4_rxdlysreset_i

gt4_rxdlysreset_i std_logic

Signal

◆ gt4_rxdlysresetdone_i

gt4_rxdlysresetdone_i std_logic

Signal

◆ gt4_rxlpmhfhold_i

gt4_rxlpmhfhold_i std_logic

Signal

◆ gt4_rxlpmlfhold_i

gt4_rxlpmlfhold_i std_logic

Signal

◆ gt4_rxoutclk_i

gt4_rxoutclk_i std_logic

Signal

◆ gt4_rxoutclk_i2

gt4_rxoutclk_i2 std_logic

Signal

◆ gt4_rxphalign_i

gt4_rxphalign_i std_logic

Signal

◆ gt4_rxphaligndone_i

gt4_rxphaligndone_i std_logic

Signal

◆ gt4_rxphalignen_i

gt4_rxphalignen_i std_logic

Signal

◆ gt4_rxphdlyreset_i

gt4_rxphdlyreset_i std_logic

Signal

◆ gt4_rxpmaresetdone_i

gt4_rxpmaresetdone_i std_logic

Signal

◆ gt4_rxresetdone_i

gt4_rxresetdone_i std_logic

Signal

◆ gt4_rxresetdone_ii

gt4_rxresetdone_ii std_logic

Signal

◆ gt4_rxresetfsm_i

gt4_rxresetfsm_i DSS_3Quads_11g2_RX_STARTUP_FSM

Instantiation

◆ gt4_rxsyncallin_i

gt4_rxsyncallin_i std_logic

Signal

◆ gt4_rxsyncdone_i

gt4_rxsyncdone_i std_logic

Signal

◆ gt4_rxsyncin_i

gt4_rxsyncin_i std_logic

Signal

◆ gt4_rxsyncmode_i

gt4_rxsyncmode_i std_logic

Signal

◆ gt4_rxsyncout_i

gt4_rxsyncout_i std_logic

Signal

◆ gt4_rxuserrdy_i

gt4_rxuserrdy_i std_logic

Signal

◆ gt4_rxuserrdy_t

gt4_rxuserrdy_t std_logic

Signal

◆ gt4_tx_manual_phase_i

gt4_tx_manual_phase_i DSS_3Quads_11g2_TX_MANUAL_PHASE_ALIGN

Instantiation

◆ gt4_tx_phalignment_done_i

gt4_tx_phalignment_done_i std_logic

Signal

◆ gt4_txdlyen_i

gt4_txdlyen_i std_logic

Signal

◆ gt4_txdlysreset_i

gt4_txdlysreset_i std_logic

Signal

◆ gt4_txdlysresetdone_i

gt4_txdlysresetdone_i std_logic

Signal

◆ gt4_txoutclk_i

gt4_txoutclk_i std_logic

Signal

◆ gt4_txoutclk_i2

gt4_txoutclk_i2 std_logic

Signal

◆ gt4_txphalign_i

gt4_txphalign_i std_logic

Signal

◆ gt4_txphaligndone_i

gt4_txphaligndone_i std_logic

Signal

◆ gt4_txphalignen_i

gt4_txphalignen_i std_logic

Signal

◆ gt4_txphdlyreset_i

gt4_txphdlyreset_i std_logic

Signal

◆ gt4_txphinit_i

gt4_txphinit_i std_logic

Signal

◆ gt4_txphinitdone_i

gt4_txphinitdone_i std_logic

Signal

◆ gt4_txpmaresetdone_i

gt4_txpmaresetdone_i std_logic

Signal

◆ gt4_txresetdone_i

gt4_txresetdone_i std_logic

Signal

◆ gt4_txresetdone_ii

gt4_txresetdone_ii std_logic

Signal

◆ gt4_txresetfsm_i

gt4_txresetfsm_i DSS_3Quads_11g2_TX_STARTUP_FSM

Instantiation

◆ gt4_txsyncallin_i

gt4_txsyncallin_i std_logic

Signal

◆ gt4_txsyncdone_i

gt4_txsyncdone_i std_logic

Signal

◆ gt4_txsyncin_i

gt4_txsyncin_i std_logic

Signal

◆ gt4_txsyncmode_i

gt4_txsyncmode_i std_logic

Signal

◆ gt4_txsyncout_i

gt4_txsyncout_i std_logic

Signal

◆ gt4_txuserrdy_i

gt4_txuserrdy_i std_logic

Signal

◆ gt4_txuserrdy_t

gt4_txuserrdy_t std_logic

Signal

◆ gt5_gtrxreset_i

gt5_gtrxreset_i std_logic

Signal

◆ gt5_gtrxreset_t

gt5_gtrxreset_t std_logic

Signal

◆ gt5_gttxreset_i

gt5_gttxreset_i std_logic

Signal

◆ gt5_gttxreset_t

gt5_gttxreset_t std_logic

Signal

◆ gt5_recclk_stable_i

gt5_recclk_stable_i std_logic

Signal

◆ gt5_rst_rx_phalignment_i

gt5_rst_rx_phalignment_i std_logic

Signal

◆ gt5_rst_tx_phalignment_i

gt5_rst_tx_phalignment_i std_logic

Signal

◆ gt5_run_rx_phalignment_i

gt5_run_rx_phalignment_i std_logic

Signal

◆ gt5_run_tx_phalignment_i

gt5_run_tx_phalignment_i std_logic

Signal

◆ gt5_rx_auto_phase_align_i

gt5_rx_auto_phase_align_i DSS_3Quads_11g2_AUTO_PHASE_ALIGN

Instantiation

◆ gt5_rx_cdrlock_counter

gt5_rx_cdrlock_counter integer range 0 to WAIT_TIME_CDRLOCK := 0

Signal

◆ gt5_rx_cdrlocked

gt5_rx_cdrlocked std_logic

Signal

◆ gt5_rx_phalignment_done_i

gt5_rx_phalignment_done_i std_logic

Signal

◆ gt5_rxdfeagchold_i

gt5_rxdfeagchold_i std_logic

Signal

◆ gt5_rxdfelfhold_i

gt5_rxdfelfhold_i std_logic

Signal

◆ gt5_rxdlyen_i

gt5_rxdlyen_i std_logic

Signal

◆ gt5_rxdlysreset_i

gt5_rxdlysreset_i std_logic

Signal

◆ gt5_rxdlysresetdone_i

gt5_rxdlysresetdone_i std_logic

Signal

◆ gt5_rxlpmhfhold_i

gt5_rxlpmhfhold_i std_logic

Signal

◆ gt5_rxlpmlfhold_i

gt5_rxlpmlfhold_i std_logic

Signal

◆ gt5_rxoutclk_i

gt5_rxoutclk_i std_logic

Signal

◆ gt5_rxoutclk_i2

gt5_rxoutclk_i2 std_logic

Signal

◆ gt5_rxphalign_i

gt5_rxphalign_i std_logic

Signal

◆ gt5_rxphaligndone_i

gt5_rxphaligndone_i std_logic

Signal

◆ gt5_rxphalignen_i

gt5_rxphalignen_i std_logic

Signal

◆ gt5_rxphdlyreset_i

gt5_rxphdlyreset_i std_logic

Signal

◆ gt5_rxpmaresetdone_i

gt5_rxpmaresetdone_i std_logic

Signal

◆ gt5_rxresetdone_i

gt5_rxresetdone_i std_logic

Signal

◆ gt5_rxresetdone_ii

gt5_rxresetdone_ii std_logic

Signal

◆ gt5_rxresetfsm_i

gt5_rxresetfsm_i DSS_3Quads_11g2_RX_STARTUP_FSM

Instantiation

◆ gt5_rxsyncallin_i

gt5_rxsyncallin_i std_logic

Signal

◆ gt5_rxsyncdone_i

gt5_rxsyncdone_i std_logic

Signal

◆ gt5_rxsyncin_i

gt5_rxsyncin_i std_logic

Signal

◆ gt5_rxsyncmode_i

gt5_rxsyncmode_i std_logic

Signal

◆ gt5_rxsyncout_i

gt5_rxsyncout_i std_logic

Signal

◆ gt5_rxuserrdy_i

gt5_rxuserrdy_i std_logic

Signal

◆ gt5_rxuserrdy_t

gt5_rxuserrdy_t std_logic

Signal

◆ gt5_tx_phalignment_done_i

gt5_tx_phalignment_done_i std_logic

Signal

◆ gt5_txdlyen_i

gt5_txdlyen_i std_logic

Signal

◆ gt5_txdlysreset_i

gt5_txdlysreset_i std_logic

Signal

◆ gt5_txdlysresetdone_i

gt5_txdlysresetdone_i std_logic

Signal

◆ gt5_txoutclk_i

gt5_txoutclk_i std_logic

Signal

◆ gt5_txoutclk_i2

gt5_txoutclk_i2 std_logic

Signal

◆ gt5_txphalign_i

gt5_txphalign_i std_logic

Signal

◆ gt5_txphaligndone_i

gt5_txphaligndone_i std_logic

Signal

◆ gt5_txphalignen_i

gt5_txphalignen_i std_logic

Signal

◆ gt5_txphdlyreset_i

gt5_txphdlyreset_i std_logic

Signal

◆ gt5_txphinit_i

gt5_txphinit_i std_logic

Signal

◆ gt5_txphinitdone_i

gt5_txphinitdone_i std_logic

Signal

◆ gt5_txpmaresetdone_i

gt5_txpmaresetdone_i std_logic

Signal

◆ gt5_txresetdone_i

gt5_txresetdone_i std_logic

Signal

◆ gt5_txresetdone_ii

gt5_txresetdone_ii std_logic

Signal

◆ gt5_txresetfsm_i

gt5_txresetfsm_i DSS_3Quads_11g2_TX_STARTUP_FSM

Instantiation

◆ gt5_txsyncallin_i

gt5_txsyncallin_i std_logic

Signal

◆ gt5_txsyncdone_i

gt5_txsyncdone_i std_logic

Signal

◆ gt5_txsyncin_i

gt5_txsyncin_i std_logic

Signal

◆ gt5_txsyncmode_i

gt5_txsyncmode_i std_logic

Signal

◆ gt5_txsyncout_i

gt5_txsyncout_i std_logic

Signal

◆ gt5_txuserrdy_i

gt5_txuserrdy_i std_logic

Signal

◆ gt5_txuserrdy_t

gt5_txuserrdy_t std_logic

Signal

◆ gt6_gtrxreset_i

gt6_gtrxreset_i std_logic

Signal

◆ gt6_gtrxreset_t

gt6_gtrxreset_t std_logic

Signal

◆ gt6_gttxreset_i

gt6_gttxreset_i std_logic

Signal

◆ gt6_gttxreset_t

gt6_gttxreset_t std_logic

Signal

◆ gt6_recclk_stable_i

gt6_recclk_stable_i std_logic

Signal

◆ gt6_rst_rx_phalignment_i

gt6_rst_rx_phalignment_i std_logic

Signal

◆ gt6_rst_tx_phalignment_i

gt6_rst_tx_phalignment_i std_logic

Signal

◆ gt6_run_rx_phalignment_i

gt6_run_rx_phalignment_i std_logic

Signal

◆ gt6_run_tx_phalignment_i

gt6_run_tx_phalignment_i std_logic

Signal

◆ gt6_rx_auto_phase_align_i

gt6_rx_auto_phase_align_i DSS_3Quads_11g2_AUTO_PHASE_ALIGN

Instantiation

◆ gt6_rx_cdrlock_counter

gt6_rx_cdrlock_counter integer range 0 to WAIT_TIME_CDRLOCK := 0

Signal

◆ gt6_rx_cdrlocked

gt6_rx_cdrlocked std_logic

Signal

◆ gt6_rx_phalignment_done_i

gt6_rx_phalignment_done_i std_logic

Signal

◆ gt6_rxdfeagchold_i

gt6_rxdfeagchold_i std_logic

Signal

◆ gt6_rxdfelfhold_i

gt6_rxdfelfhold_i std_logic

Signal

◆ gt6_rxdlyen_i

gt6_rxdlyen_i std_logic

Signal

◆ gt6_rxdlysreset_i

gt6_rxdlysreset_i std_logic

Signal

◆ gt6_rxdlysresetdone_i

gt6_rxdlysresetdone_i std_logic

Signal

◆ gt6_rxlpmhfhold_i

gt6_rxlpmhfhold_i std_logic

Signal

◆ gt6_rxlpmlfhold_i

gt6_rxlpmlfhold_i std_logic

Signal

◆ gt6_rxoutclk_i

gt6_rxoutclk_i std_logic

Signal

◆ gt6_rxoutclk_i2

gt6_rxoutclk_i2 std_logic

Signal

◆ gt6_rxphalign_i

gt6_rxphalign_i std_logic

Signal

◆ gt6_rxphaligndone_i

gt6_rxphaligndone_i std_logic

Signal

◆ gt6_rxphalignen_i

gt6_rxphalignen_i std_logic

Signal

◆ gt6_rxphdlyreset_i

gt6_rxphdlyreset_i std_logic

Signal

◆ gt6_rxpmaresetdone_i

gt6_rxpmaresetdone_i std_logic

Signal

◆ gt6_rxresetdone_i

gt6_rxresetdone_i std_logic

Signal

◆ gt6_rxresetdone_ii

gt6_rxresetdone_ii std_logic

Signal

◆ gt6_rxresetfsm_i

gt6_rxresetfsm_i DSS_3Quads_11g2_RX_STARTUP_FSM

Instantiation

◆ gt6_rxsyncallin_i

gt6_rxsyncallin_i std_logic

Signal

◆ gt6_rxsyncdone_i

gt6_rxsyncdone_i std_logic

Signal

◆ gt6_rxsyncin_i

gt6_rxsyncin_i std_logic

Signal

◆ gt6_rxsyncmode_i

gt6_rxsyncmode_i std_logic

Signal

◆ gt6_rxsyncout_i

gt6_rxsyncout_i std_logic

Signal

◆ gt6_rxuserrdy_i

gt6_rxuserrdy_i std_logic

Signal

◆ gt6_rxuserrdy_t

gt6_rxuserrdy_t std_logic

Signal

◆ gt6_tx_phalignment_done_i

gt6_tx_phalignment_done_i std_logic

Signal

◆ gt6_txdlyen_i

gt6_txdlyen_i std_logic

Signal

◆ gt6_txdlysreset_i

gt6_txdlysreset_i std_logic

Signal

◆ gt6_txdlysresetdone_i

gt6_txdlysresetdone_i std_logic

Signal

◆ gt6_txoutclk_i

gt6_txoutclk_i std_logic

Signal

◆ gt6_txoutclk_i2

gt6_txoutclk_i2 std_logic

Signal

◆ gt6_txphalign_i

gt6_txphalign_i std_logic

Signal

◆ gt6_txphaligndone_i

gt6_txphaligndone_i std_logic

Signal

◆ gt6_txphalignen_i

gt6_txphalignen_i std_logic

Signal

◆ gt6_txphdlyreset_i

gt6_txphdlyreset_i std_logic

Signal

◆ gt6_txphinit_i

gt6_txphinit_i std_logic

Signal

◆ gt6_txphinitdone_i

gt6_txphinitdone_i std_logic

Signal

◆ gt6_txpmaresetdone_i

gt6_txpmaresetdone_i std_logic

Signal

◆ gt6_txresetdone_i

gt6_txresetdone_i std_logic

Signal

◆ gt6_txresetdone_ii

gt6_txresetdone_ii std_logic

Signal

◆ gt6_txresetfsm_i

gt6_txresetfsm_i DSS_3Quads_11g2_TX_STARTUP_FSM

Instantiation

◆ gt6_txsyncallin_i

gt6_txsyncallin_i std_logic

Signal

◆ gt6_txsyncdone_i

gt6_txsyncdone_i std_logic

Signal

◆ gt6_txsyncin_i

gt6_txsyncin_i std_logic

Signal

◆ gt6_txsyncmode_i

gt6_txsyncmode_i std_logic

Signal

◆ gt6_txsyncout_i

gt6_txsyncout_i std_logic

Signal

◆ gt6_txuserrdy_i

gt6_txuserrdy_i std_logic

Signal

◆ gt6_txuserrdy_t

gt6_txuserrdy_t std_logic

Signal

◆ gt7_gtrxreset_i

gt7_gtrxreset_i std_logic

Signal

◆ gt7_gtrxreset_t

gt7_gtrxreset_t std_logic

Signal

◆ gt7_gttxreset_i

gt7_gttxreset_i std_logic

Signal

◆ gt7_gttxreset_t

gt7_gttxreset_t std_logic

Signal

◆ gt7_recclk_stable_i

gt7_recclk_stable_i std_logic

Signal

◆ gt7_rst_rx_phalignment_i

gt7_rst_rx_phalignment_i std_logic

Signal

◆ gt7_rst_tx_phalignment_i

gt7_rst_tx_phalignment_i std_logic

Signal

◆ gt7_run_rx_phalignment_i

gt7_run_rx_phalignment_i std_logic

Signal

◆ gt7_run_tx_phalignment_i

gt7_run_tx_phalignment_i std_logic

Signal

◆ gt7_rx_auto_phase_align_i

gt7_rx_auto_phase_align_i DSS_3Quads_11g2_AUTO_PHASE_ALIGN

Instantiation

◆ gt7_rx_cdrlock_counter

gt7_rx_cdrlock_counter integer range 0 to WAIT_TIME_CDRLOCK := 0

Signal

◆ gt7_rx_cdrlocked

gt7_rx_cdrlocked std_logic

Signal

◆ gt7_rx_phalignment_done_i

gt7_rx_phalignment_done_i std_logic

Signal

◆ gt7_rxdfeagchold_i

gt7_rxdfeagchold_i std_logic

Signal

◆ gt7_rxdfelfhold_i

gt7_rxdfelfhold_i std_logic

Signal

◆ gt7_rxdlyen_i

gt7_rxdlyen_i std_logic

Signal

◆ gt7_rxdlysreset_i

gt7_rxdlysreset_i std_logic

Signal

◆ gt7_rxdlysresetdone_i

gt7_rxdlysresetdone_i std_logic

Signal

◆ gt7_rxlpmhfhold_i

gt7_rxlpmhfhold_i std_logic

Signal

◆ gt7_rxlpmlfhold_i

gt7_rxlpmlfhold_i std_logic

Signal

◆ gt7_rxoutclk_i

gt7_rxoutclk_i std_logic

Signal

◆ gt7_rxoutclk_i2

gt7_rxoutclk_i2 std_logic

Signal

◆ gt7_rxphalign_i

gt7_rxphalign_i std_logic

Signal

◆ gt7_rxphaligndone_i

gt7_rxphaligndone_i std_logic

Signal

◆ gt7_rxphalignen_i

gt7_rxphalignen_i std_logic

Signal

◆ gt7_rxphdlyreset_i

gt7_rxphdlyreset_i std_logic

Signal

◆ gt7_rxpmaresetdone_i

gt7_rxpmaresetdone_i std_logic

Signal

◆ gt7_rxresetdone_i

gt7_rxresetdone_i std_logic

Signal

◆ gt7_rxresetdone_ii

gt7_rxresetdone_ii std_logic

Signal

◆ gt7_rxresetfsm_i

gt7_rxresetfsm_i DSS_3Quads_11g2_RX_STARTUP_FSM

Instantiation

◆ gt7_rxsyncallin_i

gt7_rxsyncallin_i std_logic

Signal

◆ gt7_rxsyncdone_i

gt7_rxsyncdone_i std_logic

Signal

◆ gt7_rxsyncin_i

gt7_rxsyncin_i std_logic

Signal

◆ gt7_rxsyncmode_i

gt7_rxsyncmode_i std_logic

Signal

◆ gt7_rxsyncout_i

gt7_rxsyncout_i std_logic

Signal

◆ gt7_rxuserrdy_i

gt7_rxuserrdy_i std_logic

Signal

◆ gt7_rxuserrdy_t

gt7_rxuserrdy_t std_logic

Signal

◆ gt7_tx_phalignment_done_i

gt7_tx_phalignment_done_i std_logic

Signal

◆ gt7_txdlyen_i

gt7_txdlyen_i std_logic

Signal

◆ gt7_txdlysreset_i

gt7_txdlysreset_i std_logic

Signal

◆ gt7_txdlysresetdone_i

gt7_txdlysresetdone_i std_logic

Signal

◆ gt7_txoutclk_i

gt7_txoutclk_i std_logic

Signal

◆ gt7_txoutclk_i2

gt7_txoutclk_i2 std_logic

Signal

◆ gt7_txphalign_i

gt7_txphalign_i std_logic

Signal

◆ gt7_txphaligndone_i

gt7_txphaligndone_i std_logic

Signal

◆ gt7_txphalignen_i

gt7_txphalignen_i std_logic

Signal

◆ gt7_txphdlyreset_i

gt7_txphdlyreset_i std_logic

Signal

◆ gt7_txphinit_i

gt7_txphinit_i std_logic

Signal

◆ gt7_txphinitdone_i

gt7_txphinitdone_i std_logic

Signal

◆ gt7_txpmaresetdone_i

gt7_txpmaresetdone_i std_logic

Signal

◆ gt7_txresetdone_i

gt7_txresetdone_i std_logic

Signal

◆ gt7_txresetdone_ii

gt7_txresetdone_ii std_logic

Signal

◆ gt7_txresetfsm_i

gt7_txresetfsm_i DSS_3Quads_11g2_TX_STARTUP_FSM

Instantiation

◆ gt7_txsyncallin_i

gt7_txsyncallin_i std_logic

Signal

◆ gt7_txsyncdone_i

gt7_txsyncdone_i std_logic

Signal

◆ gt7_txsyncin_i

gt7_txsyncin_i std_logic

Signal

◆ gt7_txsyncmode_i

gt7_txsyncmode_i std_logic

Signal

◆ gt7_txsyncout_i

gt7_txsyncout_i std_logic

Signal

◆ gt7_txuserrdy_i

gt7_txuserrdy_i std_logic

Signal

◆ gt7_txuserrdy_t

gt7_txuserrdy_t std_logic

Signal

◆ gt8_gtrxreset_i

gt8_gtrxreset_i std_logic

Signal

◆ gt8_gtrxreset_t

gt8_gtrxreset_t std_logic

Signal

◆ gt8_gttxreset_i

gt8_gttxreset_i std_logic

Signal

◆ gt8_gttxreset_t

gt8_gttxreset_t std_logic

Signal

◆ gt8_recclk_stable_i

gt8_recclk_stable_i std_logic

Signal

◆ gt8_rst_rx_phalignment_i

gt8_rst_rx_phalignment_i std_logic

Signal

◆ gt8_rst_tx_phalignment_i

gt8_rst_tx_phalignment_i std_logic

Signal

◆ gt8_run_rx_phalignment_i

gt8_run_rx_phalignment_i std_logic

Signal

◆ gt8_run_tx_phalignment_i

gt8_run_tx_phalignment_i std_logic

Signal

◆ gt8_rx_auto_phase_align_i

gt8_rx_auto_phase_align_i DSS_3Quads_11g2_AUTO_PHASE_ALIGN

Instantiation

◆ gt8_rx_cdrlock_counter

gt8_rx_cdrlock_counter integer range 0 to WAIT_TIME_CDRLOCK := 0

Signal

◆ gt8_rx_cdrlocked

gt8_rx_cdrlocked std_logic

Signal

◆ gt8_rx_phalignment_done_i

gt8_rx_phalignment_done_i std_logic

Signal

◆ gt8_rxdfeagchold_i

gt8_rxdfeagchold_i std_logic

Signal

◆ gt8_rxdfelfhold_i

gt8_rxdfelfhold_i std_logic

Signal

◆ gt8_rxdlyen_i

gt8_rxdlyen_i std_logic

Signal

◆ gt8_rxdlysreset_i

gt8_rxdlysreset_i std_logic

Signal

◆ gt8_rxdlysresetdone_i

gt8_rxdlysresetdone_i std_logic

Signal

◆ gt8_rxlpmhfhold_i

gt8_rxlpmhfhold_i std_logic

Signal

◆ gt8_rxlpmlfhold_i

gt8_rxlpmlfhold_i std_logic

Signal

◆ gt8_rxoutclk_i

gt8_rxoutclk_i std_logic

Signal

◆ gt8_rxoutclk_i2

gt8_rxoutclk_i2 std_logic

Signal

◆ gt8_rxphalign_i

gt8_rxphalign_i std_logic

Signal

◆ gt8_rxphaligndone_i

gt8_rxphaligndone_i std_logic

Signal

◆ gt8_rxphalignen_i

gt8_rxphalignen_i std_logic

Signal

◆ gt8_rxphdlyreset_i

gt8_rxphdlyreset_i std_logic

Signal

◆ gt8_rxpmaresetdone_i

gt8_rxpmaresetdone_i std_logic

Signal

◆ gt8_rxresetdone_i

gt8_rxresetdone_i std_logic

Signal

◆ gt8_rxresetdone_ii

gt8_rxresetdone_ii std_logic

Signal

◆ gt8_rxresetfsm_i

gt8_rxresetfsm_i DSS_3Quads_11g2_RX_STARTUP_FSM

Instantiation

◆ gt8_rxsyncallin_i

gt8_rxsyncallin_i std_logic

Signal

◆ gt8_rxsyncdone_i

gt8_rxsyncdone_i std_logic

Signal

◆ gt8_rxsyncin_i

gt8_rxsyncin_i std_logic

Signal

◆ gt8_rxsyncmode_i

gt8_rxsyncmode_i std_logic

Signal

◆ gt8_rxsyncout_i

gt8_rxsyncout_i std_logic

Signal

◆ gt8_rxuserrdy_i

gt8_rxuserrdy_i std_logic

Signal

◆ gt8_rxuserrdy_t

gt8_rxuserrdy_t std_logic

Signal

◆ gt8_tx_manual_phase_i

gt8_tx_manual_phase_i DSS_3Quads_11g2_TX_MANUAL_PHASE_ALIGN

Instantiation

◆ gt8_tx_phalignment_done_i

gt8_tx_phalignment_done_i std_logic

Signal

◆ gt8_txdlyen_i

gt8_txdlyen_i std_logic

Signal

◆ gt8_txdlysreset_i

gt8_txdlysreset_i std_logic

Signal

◆ gt8_txdlysresetdone_i

gt8_txdlysresetdone_i std_logic

Signal

◆ gt8_txoutclk_i

gt8_txoutclk_i std_logic

Signal

◆ gt8_txoutclk_i2

gt8_txoutclk_i2 std_logic

Signal

◆ gt8_txphalign_i

gt8_txphalign_i std_logic

Signal

◆ gt8_txphaligndone_i

gt8_txphaligndone_i std_logic

Signal

◆ gt8_txphalignen_i

gt8_txphalignen_i std_logic

Signal

◆ gt8_txphdlyreset_i

gt8_txphdlyreset_i std_logic

Signal

◆ gt8_txphinit_i

gt8_txphinit_i std_logic

Signal

◆ gt8_txphinitdone_i

gt8_txphinitdone_i std_logic

Signal

◆ gt8_txpmaresetdone_i

gt8_txpmaresetdone_i std_logic

Signal

◆ gt8_txresetdone_i

gt8_txresetdone_i std_logic

Signal

◆ gt8_txresetdone_ii

gt8_txresetdone_ii std_logic

Signal

◆ gt8_txresetfsm_i

gt8_txresetfsm_i DSS_3Quads_11g2_TX_STARTUP_FSM

Instantiation

◆ gt8_txsyncallin_i

gt8_txsyncallin_i std_logic

Signal

◆ gt8_txsyncdone_i

gt8_txsyncdone_i std_logic

Signal

◆ gt8_txsyncin_i

gt8_txsyncin_i std_logic

Signal

◆ gt8_txsyncmode_i

gt8_txsyncmode_i std_logic

Signal

◆ gt8_txsyncout_i

gt8_txsyncout_i std_logic

Signal

◆ gt8_txuserrdy_i

gt8_txuserrdy_i std_logic

Signal

◆ gt8_txuserrdy_t

gt8_txuserrdy_t std_logic

Signal

◆ gt9_gtrxreset_i

gt9_gtrxreset_i std_logic

Signal

◆ gt9_gtrxreset_t

gt9_gtrxreset_t std_logic

Signal

◆ gt9_gttxreset_i

gt9_gttxreset_i std_logic

Signal

◆ gt9_gttxreset_t

gt9_gttxreset_t std_logic

Signal

◆ gt9_recclk_stable_i

gt9_recclk_stable_i std_logic

Signal

◆ gt9_rst_rx_phalignment_i

gt9_rst_rx_phalignment_i std_logic

Signal

◆ gt9_rst_tx_phalignment_i

gt9_rst_tx_phalignment_i std_logic

Signal

◆ gt9_run_rx_phalignment_i

gt9_run_rx_phalignment_i std_logic

Signal

◆ gt9_run_tx_phalignment_i

gt9_run_tx_phalignment_i std_logic

Signal

◆ gt9_rx_auto_phase_align_i

gt9_rx_auto_phase_align_i DSS_3Quads_11g2_AUTO_PHASE_ALIGN

Instantiation

◆ gt9_rx_cdrlock_counter

gt9_rx_cdrlock_counter integer range 0 to WAIT_TIME_CDRLOCK := 0

Signal

◆ gt9_rx_cdrlocked

gt9_rx_cdrlocked std_logic

Signal

◆ gt9_rx_phalignment_done_i

gt9_rx_phalignment_done_i std_logic

Signal

◆ gt9_rxdfeagchold_i

gt9_rxdfeagchold_i std_logic

Signal

◆ gt9_rxdfelfhold_i

gt9_rxdfelfhold_i std_logic

Signal

◆ gt9_rxdlyen_i

gt9_rxdlyen_i std_logic

Signal

◆ gt9_rxdlysreset_i

gt9_rxdlysreset_i std_logic

Signal

◆ gt9_rxdlysresetdone_i

gt9_rxdlysresetdone_i std_logic

Signal

◆ gt9_rxlpmhfhold_i

gt9_rxlpmhfhold_i std_logic

Signal

◆ gt9_rxlpmlfhold_i

gt9_rxlpmlfhold_i std_logic

Signal

◆ gt9_rxoutclk_i

gt9_rxoutclk_i std_logic

Signal

◆ gt9_rxoutclk_i2

gt9_rxoutclk_i2 std_logic

Signal

◆ gt9_rxphalign_i

gt9_rxphalign_i std_logic

Signal

◆ gt9_rxphaligndone_i

gt9_rxphaligndone_i std_logic

Signal

◆ gt9_rxphalignen_i

gt9_rxphalignen_i std_logic

Signal

◆ gt9_rxphdlyreset_i

gt9_rxphdlyreset_i std_logic

Signal

◆ gt9_rxpmaresetdone_i

gt9_rxpmaresetdone_i std_logic

Signal

◆ gt9_rxresetdone_i

gt9_rxresetdone_i std_logic

Signal

◆ gt9_rxresetdone_ii

gt9_rxresetdone_ii std_logic

Signal

◆ gt9_rxresetfsm_i

gt9_rxresetfsm_i DSS_3Quads_11g2_RX_STARTUP_FSM

Instantiation

◆ gt9_rxsyncallin_i

gt9_rxsyncallin_i std_logic

Signal

◆ gt9_rxsyncdone_i

gt9_rxsyncdone_i std_logic

Signal

◆ gt9_rxsyncin_i

gt9_rxsyncin_i std_logic

Signal

◆ gt9_rxsyncmode_i

gt9_rxsyncmode_i std_logic

Signal

◆ gt9_rxsyncout_i

gt9_rxsyncout_i std_logic

Signal

◆ gt9_rxuserrdy_i

gt9_rxuserrdy_i std_logic

Signal

◆ gt9_rxuserrdy_t

gt9_rxuserrdy_t std_logic

Signal

◆ gt9_tx_phalignment_done_i

gt9_tx_phalignment_done_i std_logic

Signal

◆ gt9_txdlyen_i

gt9_txdlyen_i std_logic

Signal

◆ gt9_txdlysreset_i

gt9_txdlysreset_i std_logic

Signal

◆ gt9_txdlysresetdone_i

gt9_txdlysresetdone_i std_logic

Signal

◆ gt9_txoutclk_i

gt9_txoutclk_i std_logic

Signal

◆ gt9_txoutclk_i2

gt9_txoutclk_i2 std_logic

Signal

◆ gt9_txphalign_i

gt9_txphalign_i std_logic

Signal

◆ gt9_txphaligndone_i

gt9_txphaligndone_i std_logic

Signal

◆ gt9_txphalignen_i

gt9_txphalignen_i std_logic

Signal

◆ gt9_txphdlyreset_i

gt9_txphdlyreset_i std_logic

Signal

◆ gt9_txphinit_i

gt9_txphinit_i std_logic

Signal

◆ gt9_txphinitdone_i

gt9_txphinitdone_i std_logic

Signal

◆ gt9_txpmaresetdone_i

gt9_txpmaresetdone_i std_logic

Signal

◆ gt9_txresetdone_i

gt9_txresetdone_i std_logic

Signal

◆ gt9_txresetdone_ii

gt9_txresetdone_ii std_logic

Signal

◆ gt9_txresetfsm_i

gt9_txresetfsm_i DSS_3Quads_11g2_TX_STARTUP_FSM

Instantiation

◆ gt9_txsyncallin_i

gt9_txsyncallin_i std_logic

Signal

◆ gt9_txsyncdone_i

gt9_txsyncdone_i std_logic

Signal

◆ gt9_txsyncin_i

gt9_txsyncin_i std_logic

Signal

◆ gt9_txsyncmode_i

gt9_txsyncmode_i std_logic

Signal

◆ gt9_txsyncout_i

gt9_txsyncout_i std_logic

Signal

◆ gt9_txuserrdy_i

gt9_txuserrdy_i std_logic

Signal

◆ gt9_txuserrdy_t

gt9_txuserrdy_t std_logic

Signal

◆ mstr0_txsyncallin_i

mstr0_txsyncallin_i std_logic

Signal

◆ mstr4_txsyncallin_i

mstr4_txsyncallin_i std_logic

Signal

◆ mstr8_txsyncallin_i

mstr8_txsyncallin_i std_logic

Signal

◆ RX_CDRLOCK_TIME

RX_CDRLOCK_TIME integer := get_cdrlock_time ( EXAMPLE_SIMULATION )

Constant

◆ rx_cdrlocked

rx_cdrlocked std_logic

Signal

◆ rxmstr0_rxsyncallin_i

rxmstr0_rxsyncallin_i std_logic

Signal

◆ rxmstr4_rxsyncallin_i

rxmstr4_rxsyncallin_i std_logic

Signal

◆ rxmstr8_rxsyncallin_i

rxmstr8_rxsyncallin_i std_logic

Signal

◆ tied_to_ground_i

tied_to_ground_i std_logic

Signal

◆ tied_to_vcc_i

tied_to_vcc_i std_logic

Signal

◆ U0_rst_rx_phalignment_i

U0_rst_rx_phalignment_i std_logic

Signal

◆ U0_rst_tx_phalignment_i

U0_rst_tx_phalignment_i std_logic

Signal

◆ U0_run_rx_phalignment_i

U0_run_rx_phalignment_i std_logic

Signal

◆ U0_run_tx_phalignment_i

U0_run_tx_phalignment_i std_logic

Signal

◆ U0_RXDLYEN

U0_RXDLYEN std_logic_vector ( 3 downto 0 )

Signal

◆ U0_RXDLYSRESET

U0_RXDLYSRESET std_logic_vector ( 3 downto 0 )

Signal

◆ U0_RXDLYSRESETDONE

U0_RXDLYSRESETDONE std_logic_vector ( 3 downto 0 )

Signal

◆ U0_RXPHALIGN

U0_RXPHALIGN std_logic_vector ( 3 downto 0 )

Signal

◆ U0_RXPHALIGNDONE

U0_RXPHALIGNDONE std_logic_vector ( 3 downto 0 )

Signal

◆ U0_TXDLYEN

U0_TXDLYEN std_logic_vector ( 3 downto 0 )

Signal

◆ U0_TXDLYSRESET

U0_TXDLYSRESET std_logic_vector ( 3 downto 0 )

Signal

◆ U0_TXDLYSRESETDONE

U0_TXDLYSRESETDONE std_logic_vector ( 3 downto 0 )

Signal

◆ U0_TXPHALIGN

U0_TXPHALIGN std_logic_vector ( 3 downto 0 )

Signal

◆ U0_TXPHALIGNDONE

U0_TXPHALIGNDONE std_logic_vector ( 3 downto 0 )

Signal

◆ U0_TXPHINIT

U0_TXPHINIT std_logic_vector ( 3 downto 0 )

Signal

◆ U0_TXPHINITDONE

U0_TXPHINITDONE std_logic_vector ( 3 downto 0 )

Signal

◆ U4_rst_rx_phalignment_i

U4_rst_rx_phalignment_i std_logic

Signal

◆ U4_rst_tx_phalignment_i

U4_rst_tx_phalignment_i std_logic

Signal

◆ U4_run_rx_phalignment_i

U4_run_rx_phalignment_i std_logic

Signal

◆ U4_run_tx_phalignment_i

U4_run_tx_phalignment_i std_logic

Signal

◆ U4_RXDLYEN

U4_RXDLYEN std_logic_vector ( 3 downto 0 )

Signal

◆ U4_RXDLYSRESET

U4_RXDLYSRESET std_logic_vector ( 3 downto 0 )

Signal

◆ U4_RXDLYSRESETDONE

U4_RXDLYSRESETDONE std_logic_vector ( 3 downto 0 )

Signal

◆ U4_RXPHALIGN

U4_RXPHALIGN std_logic_vector ( 3 downto 0 )

Signal

◆ U4_RXPHALIGNDONE

U4_RXPHALIGNDONE std_logic_vector ( 3 downto 0 )

Signal

◆ U4_TXDLYEN

U4_TXDLYEN std_logic_vector ( 3 downto 0 )

Signal

◆ U4_TXDLYSRESET

U4_TXDLYSRESET std_logic_vector ( 3 downto 0 )

Signal

◆ U4_TXDLYSRESETDONE

U4_TXDLYSRESETDONE std_logic_vector ( 3 downto 0 )

Signal

◆ U4_TXPHALIGN

U4_TXPHALIGN std_logic_vector ( 3 downto 0 )

Signal

◆ U4_TXPHALIGNDONE

U4_TXPHALIGNDONE std_logic_vector ( 3 downto 0 )

Signal

◆ U4_TXPHINIT

U4_TXPHINIT std_logic_vector ( 3 downto 0 )

Signal

◆ U4_TXPHINITDONE

U4_TXPHINITDONE std_logic_vector ( 3 downto 0 )

Signal

◆ U8_rst_rx_phalignment_i

U8_rst_rx_phalignment_i std_logic

Signal

◆ U8_rst_tx_phalignment_i

U8_rst_tx_phalignment_i std_logic

Signal

◆ U8_run_rx_phalignment_i

U8_run_rx_phalignment_i std_logic

Signal

◆ U8_run_tx_phalignment_i

U8_run_tx_phalignment_i std_logic

Signal

◆ U8_RXDLYEN

U8_RXDLYEN std_logic_vector ( 3 downto 0 )

Signal

◆ U8_RXDLYSRESET

U8_RXDLYSRESET std_logic_vector ( 3 downto 0 )

Signal

◆ U8_RXDLYSRESETDONE

U8_RXDLYSRESETDONE std_logic_vector ( 3 downto 0 )

Signal

◆ U8_RXPHALIGN

U8_RXPHALIGN std_logic_vector ( 3 downto 0 )

Signal

◆ U8_RXPHALIGNDONE

U8_RXPHALIGNDONE std_logic_vector ( 3 downto 0 )

Signal

◆ U8_TXDLYEN

U8_TXDLYEN std_logic_vector ( 3 downto 0 )

Signal

◆ U8_TXDLYSRESET

U8_TXDLYSRESET std_logic_vector ( 3 downto 0 )

Signal

◆ U8_TXDLYSRESETDONE

U8_TXDLYSRESETDONE std_logic_vector ( 3 downto 0 )

Signal

◆ U8_TXPHALIGN

U8_TXPHALIGN std_logic_vector ( 3 downto 0 )

Signal

◆ U8_TXPHALIGNDONE

U8_TXPHALIGNDONE std_logic_vector ( 3 downto 0 )

Signal

◆ U8_TXPHINIT

U8_TXPHINIT std_logic_vector ( 3 downto 0 )

Signal

◆ U8_TXPHINITDONE

U8_TXPHINITDONE std_logic_vector ( 3 downto 0 )

Signal

◆ WAIT_TIME_CDRLOCK

WAIT_TIME_CDRLOCK integer := RX_CDRLOCK_TIME / STABLE_CLOCK_PERIOD

Constant

The documentation for this class was generated from the following file:

IP/DSS_3Quads_11g2/dss_3quads_11g2_init.vhd

Functions

Processes

Components

Constants

Signals

Attributes

Instantiations

Member Function Documentation

◆ get_cdrlock_time()

◆ gt0_cdrlock_timeout()

◆ gt10_cdrlock_timeout()

◆ gt11_cdrlock_timeout()

◆ gt1_cdrlock_timeout()

◆ gt2_cdrlock_timeout()

◆ gt3_cdrlock_timeout()

◆ gt4_cdrlock_timeout()

◆ gt5_cdrlock_timeout()

◆ gt6_cdrlock_timeout()

◆ gt7_cdrlock_timeout()

◆ gt8_cdrlock_timeout()

◆ gt9_cdrlock_timeout()

Member Data Documentation

◆ DLY

◆ DowngradeIPIdentifiedWarnings [1/2]

◆ DowngradeIPIdentifiedWarnings [2/2]

◆ DSS_3Quads_11g2_AUTO_PHASE_ALIGN

◆ dss_3quads_11g2_i

◆ DSS_3Quads_11g2_multi_gt

◆ DSS_3Quads_11g2_RX_MANUAL_PHASE_ALIGN

◆ DSS_3Quads_11g2_RX_STARTUP_FSM

◆ DSS_3Quads_11g2_TX_MANUAL_PHASE_ALIGN

◆ DSS_3Quads_11g2_TX_STARTUP_FSM

◆ gt0_gtrxreset_i

◆ gt0_gtrxreset_t

◆ gt0_gttxreset_i

◆ gt0_gttxreset_t

◆ gt0_qplllock_i

◆ gt0_qpllrefclklost_i

◆ gt0_qpllreset_i

◆ gt0_qpllreset_t

◆ gt0_recclk_stable_i

◆ gt0_rst_rx_phalignment_i

◆ gt0_rst_tx_phalignment_i

◆ gt0_run_rx_phalignment_i

◆ gt0_run_tx_phalignment_i

◆ gt0_rx_auto_phase_align_i

◆ gt0_rx_cdrlock_counter

◆ gt0_rx_cdrlocked

◆ gt0_rx_phalignment_done_i

◆ gt0_rxdfeagchold_i

◆ gt0_rxdfelfhold_i

◆ gt0_rxdlyen_i

◆ gt0_rxdlysreset_i

◆ gt0_rxdlysresetdone_i

◆ gt0_rxlpmhfhold_i

◆ gt0_rxlpmlfhold_i

◆ gt0_rxoutclk_i

◆ gt0_rxoutclk_i2

◆ gt0_rxphalign_i

◆ gt0_rxphaligndone_i

◆ gt0_rxphalignen_i

◆ gt0_rxphdlyreset_i

◆ gt0_rxpmaresetdone_i

◆ gt0_rxresetdone_i

◆ gt0_rxresetdone_ii

◆ gt0_rxresetfsm_i

◆ gt0_rxsyncallin_i

◆ gt0_rxsyncdone_i

◆ gt0_rxsyncin_i

◆ gt0_rxsyncmode_i

◆ gt0_rxsyncout_i

◆ gt0_rxuserrdy_i

◆ gt0_rxuserrdy_t

◆ gt0_tx_manual_phase_i

◆ gt0_tx_phalignment_done_i

◆ gt0_txdlyen_i

◆ gt0_txdlysreset_i

◆ gt0_txdlysresetdone_i

◆ gt0_txoutclk_i

◆ gt0_txoutclk_i2