FIFO_to_MGT_TOB_FSM.vhd File Reference

FSM to read TOB/XTOB data from Link Output FIFO for process FPGA. More...

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Entities
FIFO_to_MGT_TOB_FSM	entity
	FSM to read TOB/XTOB data from Link Output FIFO for process FPGA. More...
Behavioral	architecture
	FSM to read TOB/XTOB data from Link Output FIFO for process FPGA. More...

Detailed Description

FSM to read TOB/XTOB data from Link Output FIFO for process FPGA.

This module reads a complete TOB/XTOB event together with Header and Trailer and writes the entire event into the MGT.

The frame counter is incremented/decremented as events are written/read from the Link_output FIFO.

This FSM reads TOB/XTOB frames from Link Output FIFO and writes into MGT to transmit to cFPGA.

This FSM handles one full frame at a time without pausing.

It monitors the TOB frame counter to find out if there are Frames waiting to be transmitted to cFPGA.

The Frames are only transmitted when cFPGA indicates it is ready to receive data by setting ctrl_TOB_ready signal to 1.

If ctrl_TOB_ready signal is set to 0 by cFPGA, this indicates cFPGA is not ready to receive data, in this case events accumulate in Link Output FIFO until occupancy reaches a pre-define prog_FULL level, at this time, Link Output FIFO stops receiving data.

Author

Saeed Taghavi

Definition in file FIFO_to_MGT_TOB_FSM.vhd.