Behavioral Architecture Reference

Core of the electromagnetic algorithm. More...

Processes
CONDITIONS	( CLK200 )

Components
Mult

Signals
ParJet	AlgoParameters ( 2 downto 0 )
ParFrac	AlgoParameters ( 2 downto 0 )
LSF_Data	DataWords ( 3 downto 0 )
LSF_DataUp	DataWords ( 3 downto 0 )
LSF_DataDown	DataWords ( 3 downto 0 )
LSF_Seed	std_logic_vector ( 1 downto 0 )
LSF_UpNotDown	std_logic
SF_sum	DataWords ( 8 downto 0 )
SF_of	std_logic_vector ( 8 downto 0 )
ConditionThr	DataWord
EnergyThr	DataWord
ConditionThr_d	DataWord
EnergyThr_d	DataWord
SF_IsMax	std_logic
IM_Energy_L1	DataWords ( 9 downto 0 )
IM_Energy_L2	DataWords ( 9 downto 0 )
IM_Energy_L0	DataWords ( 5 downto 0 )
IM_Energy_L3	DataWords ( 5 downto 0 )
IM_Energy_HAD	DataWords ( 5 downto 0 )
IM_JetCoreData	DataWords ( 5 downto 0 )
IM_JetEnvData	DataWords ( 11 downto 0 )
MA_EnergySum	DataWord
MA_EnergyOverflow	std_logic
MA_JetEnvSum	DataWord
MA_JetEnvOverflow	std_logic
MA_JetCoreOverflow	std_logic
MA_JetCoreSum	DataWord
MA_FracEnvSum	DataWord
MA_FracEnvOverflow	std_logic
MA_FracCoreOverflow	std_logic
MA_FracCoreSum	DataWord
MU_JetEnvOverflows	std_logic_vector ( IN_ParJet ' high downto 0 )
MU_JetEnvMult	DataWords ( IN_ParJet ' high downto 0 )
MU_FracEnvOverflows	std_logic_vector ( IN_ParFrac ' high downto 0 )
MU_FracEnvMult	DataWords ( IN_ParFrac ' high downto 0 )
Delayed	std_logic_vector ( 3 downto 0 )
DL_Seed	std_logic_vector ( 1 downto 0 )
DL_UpNotDown	std_logic
DL_IsMax	std_logic
DL_Overflows	std_logic_vector ( 1 downto 0 )
DL_JetEnvOverflow	std_logic
DL_FracEnvOverflow	std_logic
TOBEnergy	DataWord
TOBEnergyOverflow	std_logic
JetCondition	std_logic_vector ( 1 downto 0 )
FracCondition	std_logic_vector ( 1 downto 0 )
max_enable	std_logic

Instantiations
little_seed_finder	LittleSeedFinder <Entity LittleSeedFinder>
input_multiplexer	tauInputMultiplexer <Entity tauInputMultiplexer>
energy_adder	MultiAdder <Entity MultiAdder>
seed_finder_adder	MultiAdder <Entity MultiAdder>
tau_seed_finder	TauSeedFinder <Entity TauSeedFinder>
multi_adder_jet_env	MultiAdder <Entity MultiAdder>
multi_adder_jet_core	MultiAdder <Entity MultiAdder>
multi_adder_frac_env	MultiAdder <Entity MultiAdder>
multi_adder_frac_core	MultiAdder <Entity MultiAdder>
jet_multiplier	MultiMultiplier <Entity MultiMultiplier>
condition_threshold_delay	Delay <Entity Delay>
frac_multiplier	MultiMultiplier <Entity MultiMultiplier>
energy_threshold_delay	Delay <Entity Delay>
tau_seed_delay	GeneralDelay <Entity GeneralDelay>
little_seed_delay	GeneralDelay <Entity GeneralDelay>
overflow_delay	GeneralDelay <Entity GeneralDelay>

Detailed Description

Core of the electromagnetic algorithm.

The total latency of this block is 10 clock cycles, this is a table representing the timing:

clock cycle	0	1	2	3	4	5	6	7	8	9	10
RAM address	0	1	2	3	4	0	1	2	3	4	0
seed finder	X	X
In mux	X	X
Adders env			X	X	X	X
Addders core			X	X	X	X	X	X	X
Multipliers							X	X	X
Seed delay			X	X	X	X	X	X	X	X	X
TOB energy										X	X
Threshold delay						X	X	X
Conditions										X	X
Dead Mat. Corr.			X
DMC delay	X	X

At clock cycle 0 the data is provided to the algorithm.

At clock cycle 1, the seed is ready and so is the data coming out of the input multiplexer, which is provided to the adders.

At clock cycle 5, the envoronment sums are ready and fed into the multipliers.

At clock cycle 8, all the sums and the multiplications are done and the valued are fed into the conditions

At clock cycle 8 also the energy threshold is applied.

At clock cycle 10 the TOBs are formed with the conditions bits and the Energy

The parameters used to evaluate the conditions are read from the RAM at clock cycle 0 or 5 (the RAM address goes form 0 to 4).

A delay of 2 clock cycles is used to pipeline the correct value for Dead Materal Correction (DMC) parameters that are read at clock cycle 2, i.e. when data is provided to the adders.

A delay of 3 clock cycles is used to delay the energy thresholds which are read at clock cycle 8, i.e. when the conditions are evaluated.

Author

Francesco Gonnella

Definition at line 33 of file AlgoCore_tau.vhd.

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The documentation for this class was generated from the following file:

• Algorithm/hdl/AlgoCore_tau.vhd