eFEX firmware  1.7.3
ATLAS l1-calo - electron and tau feature extraction firmware for eFEX boards

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Attributes | Constants | Instantiations | Processes | Signals | Types
Behavioral Architecture Reference

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Processes

update_counter_bcr_block  ( clk )
register_update_control  ( clk )
register_update  ( clk )
reset_control  ( clk )
ttc_registers  ( clk )
rod1_tx_reset_block  ( clk )
rod2_tx_reset_block  ( clk )
rod_registers  ( clk )
control_xoff_block  ( clk )
control_busy_block  ( clk )
processor_busy_block  ( clk )
busy_xoff_registers  ( clk )

Constants

aurora_status_slv_bus  integer_array ( 1 downto 0 ) := ( N_SLV_AURORA_STATUS_2 , N_SLV_AURORA_STATUS_1 )
aurora_gt_txctl_slv_bus  integer_array ( 7 downto 0 ) := ( N_SLV_AURORA2_GT3_TXCTRL , N_SLV_AURORA2_GT2_TXCTRL , N_SLV_AURORA2_GT1_TXCTRL , N_SLV_AURORA2_GT0_TXCTRL , N_SLV_AURORA1_GT3_TXCTRL , N_SLV_AURORA1_GT2_TXCTRL , N_SLV_AURORA1_GT1_TXCTRL , N_SLV_AURORA1_GT0_TXCTRL )
rod_link_status_slv_bus  integer_array ( 1 downto 0 ) := ( N_SLV_ROD_LINK_STATUS_ROD1 , N_SLV_ROD_LINK_STATUS_ROD0 )
busy_xoff_slv_bus  integer_array ( 13 downto 0 ) := ( N_SLV_PROCESSOR_BUSY_STATUS_P3 , N_SLV_PROCESSOR_BUSY_STATUS_P2 , N_SLV_PROCESSOR_BUSY_STATUS_P1 , N_SLV_PROCESSOR_BUSY_STATUS_P0 , N_SLV_CONTROL_BUSY_STATUS_P3 , N_SLV_CONTROL_BUSY_STATUS_P2 , N_SLV_CONTROL_BUSY_STATUS_P1 , N_SLV_CONTROL_BUSY_STATUS_P0 , N_SLV_CONTROL_XOFF_STATUS_P3 , N_SLV_CONTROL_XOFF_STATUS_P2 , N_SLV_CONTROL_XOFF_STATUS_P1 , N_SLV_CONTROL_XOFF_STATUS_P0 , N_SLV_BACKPLANE_XOFF_STATUS_ROD1 , N_SLV_BACKPLANE_XOFF_STATUS_ROD0 )

Types

integer_array  array ( natural range <> ) of integer range 0 to N_SLAVES

Signals

ipbw  ipb_wbus_array ( N_SLAVES- 1 downto 0 )
ipbr  ipb_rbus_array ( N_SLAVES- 1 downto 0 )
aurora_status_bus  mgt_data_array ( 1 downto 0 )
aurora_gt_txctl_bus  mgt_data_array ( 7 downto 0 )
counter_control  std_logic_vector ( 31 downto 0 )
bc_count  std_logic_vector ( 31 downto 0 )
bc_count_ipb  std_logic_vector ( 31 downto 0 )
update_counter_reg_1  std_logic
update_counter_reg_2  std_logic
update_counter_reg_3  std_logic
update_counter_bcr  std_logic
update_counter_reg  std_logic
err_cntr_rst  std_logic
status_cntr_rst  std_logic
xoff_cntr_rst  std_logic
ttc_bits  std_logic_vector ( 3 downto 0 )
ttc_counters  mgt_data_array ( 3 downto 0 )
ttc_counters_ipb  mgt_data_array ( 3 downto 0 )
last_l1id  std_logic_vector ( 31 downto 0 )
input_data_l1id  std_logic_vector ( 31 downto 0 )
last_l1id_ipb  std_logic_vector ( 31 downto 0 )
input_data_l1id_ipb  std_logic_vector ( 31 downto 0 )
rod_status  std_logic_vector ( 7 downto 0 )
last_rod_status  std_logic_vector ( 7 downto 0 )
rod_pulse  std_logic_vector ( 7 downto 0 )
rod1_tx_reset  std_logic_vector ( 1 downto 0 )
rod2_tx_reset  std_logic_vector ( 1 downto 0 )
rod_counters  mgt_data_array ( 7 downto 0 )
rod_counters_ipb  mgt_data_array ( 7 downto 0 )
control_xoff_reg  std_logic_vector ( 15 downto 0 )
control_busy_reg  std_logic_vector ( 15 downto 0 )
processor_busy_reg  std_logic_vector ( 15 downto 0 )
busy_xoff_bus_a  std_logic_vector ( 27 downto 0 )
busy_xoff_bus_b  std_logic_vector ( 27 downto 0 )
busy_xoff_bus_c  std_logic_vector ( 27 downto 0 )
busy_xoff_reset_bus  std_logic_vector ( 27 downto 0 )
busy_xoff_count_bus  std_logic_vector ( 27 downto 0 )
busy_xoff_assert_bus  std_logic_vector ( 27 downto 0 )
busy_xoff_total_counter_bus  mgt_data_array ( 27 downto 0 )
busy_xoff_active_counter_bus  mgt_data_array ( 27 downto 0 )
busy_xoff_total_counter_bus_ipb  mgt_data_array ( 27 downto 0 )
busy_xoff_active_counter_bus_ipb  mgt_data_array ( 27 downto 0 )
busy_xoff_assert_counter_bus  mgt_data_array ( 27 downto 0 )
busy_xoff_assert_counter_bus_ipb  mgt_data_array ( 27 downto 0 )

Attributes

ASYNC_REG  string
ASYNC_REG  signal is " TRUE "

Instantiations

fabric_cntrl_backplane  ipbus_fabric_sel
control  ipbus_ctrlreg_v
ttc_status  ipbus_ctrlreg_v
aurora_status  ipbus_ctrlreg_v
aurora_gt_txctl  ipbus_ctrlreg_v
rod_link_status  ipbus_ctrlreg_v
busy_xoff_status  ipbus_ctrlreg_v
ttc_counter_block  cntr_generic <Entity cntr_generic>
rod_counter_block  cntr_generic <Entity cntr_generic>
bc_counter  cntr_generic <Entity cntr_generic>
total_counter_block  cntr_generic <Entity cntr_generic>
active_counter_block  cntr_generic <Entity cntr_generic>
assert_counter_block  cntr_generic <Entity cntr_generic>

Detailed Description

Definition at line 58 of file backplane_registers.vhd.


The documentation for this class was generated from the following file: