struct Architecture Reference

eFEX Fibre mapping module More...

Signals
EmSyncIn	FibreAllEm
EmSyncOut	FibreAllEm
HadSyncIn	FibreAllHad
HadSyncOut	FibreAllHad
SpareSyncIn	FibreAllSpare
SpareSyncOut	FibreAllSpare
fpga_number_sig	integer

Instantiations
emsync	RegSyncLogic <Entity RegSyncLogic>
hadsync	RegSyncLogic <Entity RegSyncLogic>
sparesync	RegSyncLogic <Entity RegSyncLogic>

Detailed Description

eFEX Fibre mapping module

This module remaps data coming from the MGTs into algorithm format. This is done as a function of the fpga number (flavour) before synthesis and dynamically by means of the IPbus register value onnected to eFEXPoistion_in. The actual remapping is all done with subprograms contained in the EfexDataFormats package.

Author

Ian Brawn

Francesco Gonnella

Definition at line 38 of file fibremap_block.vhd.

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The documentation for this class was generated from the following file:

• Infrastructure/process_Fpga_common/src/Data_Path/fibremap_block.vhd