Behavioral Architecture Reference

MGT quad ipbus control. More...

Signals
ipbw	ipb_wbus_array ( N_SLAVES- 1 downto 0 )
ipbr	ipb_rbus_array ( N_SLAVES- 1 downto 0 )
ipbr_d	ipb_rbus_array ( N_SLAVES- 1 downto 0 )
error_counter_reset	std_logic
encode_error_int	std_logic_vector ( 3 downto 0 )
rx_disperr_int	std_logic_vector ( 3 downto 0 )
rdy	std_logic_vector ( 3 downto 0 )
mgtdata_enable	std_logic_vector ( 3 downto 0 )
softreset_rx_int	std_logic
softreset_tx_int	std_logic
error_counter_reset_int	std_logic
control_reg	std_logic_vector ( 31 downto 0 )
synch_reg	std_logic_vector ( 31 downto 0 )
pulse_reg	std_logic_vector ( 31 downto 0 )
quad_status	std_logic_vector ( 31 downto 0 )
phase_reg	std_logic_vector ( 31 downto 0 )
pulse_reset	std_logic
softreset_rx_i	std_logic
error_counter_reset_i	std_logic
softreset_tx_i	std_logic
clr_pulse_reg	std_logic
cntr_reset	std_logic
sel_bcn_or_bc_cnt	std_logic

Attributes
keep	string
max_fanout	integer
keep	signal is " true "
max_fanout	signal is 40

Instantiations
fabric_quad	ipbus_fabric_sel
fabric_quad	ipbus_fabric_sel
softreset_rx_pulse	led_stretch <Entity led_stretch>
softreset_tx_pulse	led_stretch <Entity led_stretch>
error_counter_reset_pulse	led_stretch <Entity led_stretch>
mgt_quad_control	ipbus_ctrlreg_v
mgt_quad_synch	ipbus_ctrlreg_v
mgt_quad_pulse	ipbus_ctrlreg_v
mgt_quad_status	ipbus_ctrlreg_v
mgt_quad_phase	ipbus_ctrlreg_v
mgt_gt0	gt_information <Entity gt_information>
mgt_gt1	gt_information <Entity gt_information>
mgt_gt2	gt_information <Entity gt_information>
mgt_gt3	gt_information <Entity gt_information>

Detailed Description

MGT quad ipbus control.

Module connects the quad mgts to the ipbus registers for status and control of the quad if is enabled Each MGT connects directly to their registers for control and status. If the quad is not enabled then it will return deadbeef through the ipbus

Author

Mohammed Syiad

Francesco Gonnella

Definition at line 132 of file mgt_quad_slaves.vhd.

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The documentation for this class was generated from the following file:

• Infrastructure/process_Fpga_common/src/MGT/vhdl/mgt_quad_slaves.vhd