Behavioral Architecture Reference

MGT ipbus control. More...

Constants
mgt_n	MGT_IPBUS_NUMBER := ( N_SLV_MGT_219 , N_SLV_MGT_218 , N_SLV_MGT_217 , N_SLV_MGT_216 , N_SLV_MGT_215 , N_SLV_MGT_214 , N_SLV_MGT_213 , N_SLV_MGT_212 , N_SLV_MGT_211 , N_SLV_MGT_210 , N_SLV_MGT_119 , N_SLV_MGT_118 , N_SLV_MGT_117 , N_SLV_MGT_116 , N_SLV_MGT_115 , N_SLV_MGT_114 , N_SLV_MGT_113 , N_SLV_MGT_112 , N_SLV_MGT_111 , N_SLV_MGT_110 )

Types
MGT_IPBUS_NUMBER	( 19 downto 0 ) integer

Signals
ipbw	ipb_wbus_array ( N_SLAVES- 1 downto 0 )
ipbr	ipb_rbus_array ( N_SLAVES- 1 downto 0 )
ipbr_d	ipb_rbus_array ( N_SLAVES- 1 downto 0 )
clock	std_logic_vector ( 79 downto 0 )

Instantiations
mgt_fabric	ipbus_fabric_sel
quad	mgt_quad_slaves <Entity mgt_quad_slaves>

Detailed Description

MGT ipbus control.

This Module combines all the slaves of the MGTs in the design and connects to the ipbus registers. it uses generic values that allow to implement only the slaves of enabled quads in the design Implements the control and status interface to all of the MGTs in the design as follows:

• Control registers for each of 16 MGT Quads that enable the MGTs and control of the loopback mode of MGTs.
• Implements pulse for softreset_tx one per MGT Tx-Rx Quad that resets to tx side of the MGTs
• Implements pulse for softreset_x one per MGT Tx-Rx Quad that resets to tx side of the MGTs.
• 16 bits register for pll_lock in QPLL status bits one per MGT Quad
• 16 bits register for pll_refclklost in QPLL status bits; one per MGT Quad
• 16 bits register for qpll_fsm_reset_done in QPLL status bits; one per MGT Quad
• 64 bits register for rx_resetdone in MGT Rx status bits, one per (Tx-Rx and Rx) MGT
• 64 bits register for rx_fsm_resetdone in MGT Rx status bits, one per (Tx-Rx and Rx) MGT
• 64 bits register for rx_byteisaligned in MGT Rx status bits, one per (Tx-Rx and Rx) MGT
• 16 bits register for tx_resetdone in MGT Tx status bits, one per Tx-Rx MGT
• 16 bits register for tx_fsm_resetdone in MGT Tx status bits, one per Tx-Rx MGT
• 64 bits register for rx_realign in MGT Rx status bits, one per (Tx-Rx and Rx) MGT
• 64 bits register for rx_disperr in MGT Rx status bits, one per (Tx-Rx and Rx) MGT
• 64 bits register for encode_error in MGT Rx status bits, one per (Tx-Rx and Rx) MGT

Definition at line 150 of file mgt_slaves.vhd.

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The documentation for this class was generated from the following file:

• Infrastructure/process_Fpga_common/src/MGT/vhdl/mgt_slaves.vhd