rtl Architecture Reference

Processes
Bad_mgt_L1ID_latch	( clk_320 )
send_tob_latch	( clk_320 )
send_to_spy_block	( clk_320 )

Components
fifo_spy	<Entity fifo_spy>

Signals
bad_l1id_sig	std_logic
send_tob_sig	std_logic
spy_last_sig	std_logic
spy_valid_sig	std_logic
spy_data_sig	std_logic_vector ( 63 DOWNTO 0 )

Instantiations
debug_spy	fifo_spy <Entity fifo_spy>

Detailed Description

Definition at line 43 of file tob_merger_spy.vhd.

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The documentation for this class was generated from the following file:

• Infrastructure/control_fpga/src/data_path/tob_merger_spy.vhd