16 use ieee.std_logic_1164.
all;
17 use ieee.numeric_std.
all;
19 LIBRARY infrastructure_lib;
24 generic(NSRC: positive := 4);
27 rst_clk : in std_logic;
29 eFEX_number : in std_logic_vector(7 downto 0);
30 pause : in std_logic := '0';
31 packet_mux_enabled : IN std_logic_vector(NSRC-1 downto 0);
32 packet_mux_reset : IN std_logic_vector(NSRC-1 downto 0);
33 packet_mux_source : OUT std_logic_vector(3 downto 0);
36 packet_mux_valid : IN std_logic_vector(NSRC-1 downto 0);
37 packet_mux_last : IN std_logic_vector(NSRC-1 downto 0);
38 packet_mux_ready : OUT std_logic_vector(NSRC-1 downto 0);
41 packet_valid : OUT std_logic;
42 packet_last : OUT std_logic;
43 packet_ready : IN std_logic
56 signal state_sig: STATE_TYPE := hunting;
57 signal src, hunting_src: unsigned(3 downto 0) := (Others => '0');
58 signal sel, hunting_sel: integer range 0 to NSRC+1 := 0;
59 signal active: std_logic;
60 signal packet_mux_data_sig: packet_data_array(NSRC+1 downto 0);
61 signal packet_mux_valid_sig, packet_mux_last_sig, packet_mux_reset_sig: std_logic_vector(NSRC+1 downto 0);
62 signal packet_mux_ready_sig, packet_mux_enabled_sig: std_logic_vector(NSRC-1 downto 0);
66 sel <= to_integer(src);
67 hunting_sel <= to_integer(hunting_src);
68 packet_mux_source <= std_logic_vector(src);
70 packet_mux_data_sig(NSRC+1) <= (Others => '0');
71 packet_mux_data_sig(NSRC) <= x"00000028000" & eFEX_number & x"000";
73 packet_mux_valid_sig <= "01" & packet_mux_valid;
74 packet_mux_last_sig <= "01" & packet_mux_last;
75 packet_mux_reset_sig <= "00" & packet_mux_reset;
76 packet_mux_enabled_sig <= packet_mux_enabled;
77 packet_mux_ready <= packet_mux_ready_sig;
81 if rising_edge(clk) then
84 src <= (others => '0');
85 hunting_src <= (others => '0');
91 if (packet_mux_last_sig(sel) = '1') and (packet_ready = '1') then
93 src <= to_unsigned(NSRC+1, 4);
95 elsif (packet_mux_reset_sig(sel) = '1') then
96 src <= to_unsigned(NSRC, 4);
100 state_sig <= running;
102 if (pause = '1') then
105 elsif (packet_mux_valid_sig(hunting_sel) = '1') and (packet_mux_enabled_sig(hunting_sel) = '1') and (packet_mux_reset_sig(hunting_sel) = '0') then
107 state_sig <= starting;
109 elsif (packet_mux_valid_sig(0) = '1') and (packet_mux_enabled_sig(0) = '1') and (packet_mux_reset_sig(0) = '0') then
110 src <= (others => '0');
111 state_sig <= starting;
113 elsif (hunting_src /= (NSRC-1)) then
114 hunting_src <= hunting_src + 1;
116 hunting_src <= to_unsigned(1, 4);
124 packet_valid <= packet_mux_valid_sig(sel) when active = '1' else '0';
126 packet_last <= packet_mux_last_sig(sel);
128 ackgen: for i in NSRC-1 downto 0 generate
130 packet_mux_ready_sig(i) <= packet_ready when (sel = i) and (active = '1') else '0';
AXI-stream MUX into packet engine...
AXI-stream MUX into packet engine...
in packet_mux_data packet_data_array( NSRC- 1 downto 0)
Input signals.
out packet_data std_logic_vector( 63 DOWNTO 0)
FIFO signals.