rtl Architecture Reference

Signals
clk125_fr	std_logic
clk125	std_logic
clk200	std_logic
clk_ipb	std_logic
clk_ipb_i	std_logic
locked	std_logic
rst125	std_logic
rst_ipb	std_logic
rst_ipb_ctrl	std_logic
rst_eth	std_logic
onehz	std_logic
pkt	std_logic
mac_tx_data	std_logic_vector ( 7 downto 0 )
mac_rx_data	std_logic_vector ( 7 downto 0 )
mac_tx_valid	std_logic
mac_tx_last	std_logic
mac_tx_error	std_logic
mac_tx_ready	std_logic
mac_rx_valid	std_logic
mac_rx_last	std_logic
mac_rx_error	std_logic
led_p	std_logic_vector ( 0 downto 0 )

Instantiations
clocks	clocks_7s_extphy <Entity clocks_7s_extphy>
stretch	led_stretcher <Entity led_stretcher>
eth	eth_7s_1000basex <Entity eth_7s_1000basex>
ipbus	ipbus_ctrl <Entity ipbus_ctrl>

Member Data Documentation

clk125

clk125 std_logic

Signal

clk125_fr

clk125_fr std_logic

Signal

clk200

clk200 std_logic

Signal

clk_ipb

clk_ipb std_logic

Signal

clk_ipb_i

clk_ipb_i std_logic

Signal

clocks

clocks clocks_7s_extphy

Instantiation

eth

eth eth_7s_1000basex

Instantiation

ipbus

ipbus ipbus_ctrl

Instantiation

led_p

led_p std_logic_vector ( 0 downto 0 )

Signal

locked

locked std_logic

Signal

mac_rx_data

mac_rx_data std_logic_vector ( 7 downto 0 )

Signal

mac_rx_error

mac_rx_error std_logic

Signal

mac_rx_last

mac_rx_last std_logic

Signal

mac_rx_valid

mac_rx_valid std_logic

Signal

mac_tx_data

mac_tx_data std_logic_vector ( 7 downto 0 )

Signal

mac_tx_error

mac_tx_error std_logic

Signal

mac_tx_last

mac_tx_last std_logic

Signal

mac_tx_ready

mac_tx_ready std_logic

Signal

mac_tx_valid

mac_tx_valid std_logic

Signal

onehz

onehz std_logic

Signal

pkt

pkt std_logic

Signal

rst125

rst125 std_logic

Signal

rst_eth

rst_eth std_logic

Signal

rst_ipb

rst_ipb std_logic

Signal

rst_ipb_ctrl

rst_ipb_ctrl std_logic

Signal

stretch

stretch led_stretcher

Instantiation

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The documentation for this class was generated from the following file:

• ipbus_lib/boards/xilinx_eval/base_fw/kc705_gmii/firmware/hdl/kc705_gmii_infra.vhd