fsm_extra_busy_en.vhd

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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
 
use IEEE.NUMERIC_STD.ALL;
 
library TOB_rdout_lib;
use TOB_rdout_lib.TOB_rdout_ip_pkg.ALL;
use TOB_rdout_lib.data_type_pkg.all;
 
entity fsm_extra_busy_en is
    Port ( 
       CLK_IN                : in STD_LOGIC;
       busy_counter_rst       : in std_logic ;       
       RST                    : in STD_LOGIC;
       busy_extra_en_out            : out STD_LOGIC
       );  
end fsm_extra_busy_en;
 
architecture Behavioral of fsm_extra_busy_en is
 
    signal  busy_en_out_i          : std_logic ;
 
    TYPE STATE_TYPE IS (
       idle,
       ser_1,
       ser_2,
       ser_3,
       ser_4
       ) ;
  
    SIGNAL current_state : STATE_TYPE;
 
begin
    
    -- output ports
    busy_extra_en_out <= busy_en_out_i ;
 
 
-- This FSM generated the enable signa for NUSY counters
 
U3_rd_XTOB_fsm : process (CLK_IN)
         
    begin
        if CLK_IN'event and CLK_IN = '1' then
            if (RST = '1' OR busy_counter_rst = '1')then 
                current_state   <= idle ;
                busy_en_out_i    <= '0' ;
            else    
                CASE current_state is
                    when idle =>
                        busy_en_out_i    <= '1' ;
                        current_state <= ser_1 ;
                        
                    when ser_1 =>
                        busy_en_out_i    <= '0' ;
                        current_state <= ser_1 ;
                        
--                    when ser_2 =>
--                        busy_en_out_i    <= '0' ;
--                        if busy_counter_rst = '0' then   -- on L1A
--                            current_state <= idle ;
--                        else
--                            current_state <= ser_2 ;
--                        end if;
 
                    when others =>
                        NULL;
                end case;
            end if;
        END IF;                
    end process;
 
end Behavioral;